Abstract
This paper proposes test design architecture suitable for built-in self-testing (BIST) of embedded cores-based digital circuits by using a reconfigurable device. In the paper, a sample circuit under test (CUT) and its corresponding space compressor were realized in Java language, downloaded, and then tested at runtime in a simulation environment written in JBits.
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Assaf, M.H. et al. (2004). Implementation of Embedded Cores-Based Digital Devices in JBits Java Simulation Environment. In: Das, G., Gulati, V.P. (eds) Intelligent Information Technology. CIT 2004. Lecture Notes in Computer Science, vol 3356. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30561-3_33
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DOI: https://doi.org/10.1007/978-3-540-30561-3_33
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