Abstract
In this paper, we propose a new next generation high-performance micro-architecture based on the combination of simultaneous multithreading and trace processor. By exploiting both Instruction-Level Parallelism and Thread-Level Parallelism, Simultaneous Multithreading Trace Processor can be expected to achieve higher performance than SMT or Trace Processor individual. We describe the organization of SMT Trace Processor architecture and some fundamental techniques. A path-based multiple traces prediction mechanism is also described in the paper.
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© 2003 Springer-Verlag Berlin Heidelberg
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Wang, K.F., Ji, Z., Hu, M. (2003). Simultaneous Multithreading Trace Processors. In: Zhou, X., Xu, M., Jähnichen, S., Cao, J. (eds) Advanced Parallel Processing Technologies. APPT 2003. Lecture Notes in Computer Science, vol 2834. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39425-9_10
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DOI: https://doi.org/10.1007/978-3-540-39425-9_10
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-20054-3
Online ISBN: 978-3-540-39425-9
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