Abstract
As feature size is getting smaller, gate counts and clock speed are increasing, and so does power consumption. Designing for low power consuption has thus become mandatory for a large fraction of the ICs that will hit the market in the near future.
This presentation offers the view of the EDA world to the problem of low power design, highligthing the current status of design methodologies and tools, as well as providing a forecast of how the EDA vendors intend to face the power problem for the new generations of electronic technologies.
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© 2003 Springer-Verlag Berlin Heidelberg
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Domic, A. (2003). The Emergence of Design for Energy Efficiency: An EDA Perspective. In: Chico, J.J., Macii, E. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2003. Lecture Notes in Computer Science, vol 2799. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39762-5_21
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DOI: https://doi.org/10.1007/978-3-540-39762-5_21
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-20074-1
Online ISBN: 978-3-540-39762-5
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