Abstract
Power estimation of behavioral descriptions is a difficult task, as it entails inferring the hardware architecture on which the behavioral specification will be mapped through synthesis before the synthesis is actually performed. To cope with the uncertainties related to handling behavioral descriptions, we introduce the concept of statistical estimation, and we sketch how a prototype statistical power estimator has been implemented within a high-level design exploration framework (the AspeCts environment).
This work was supported by Philips Electronics B.V. under grant n. 200/2001.
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Arts, B. et al. (2003). Statistical Power Estimation of Behavioral Descriptions. In: Chico, J.J., Macii, E. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2003. Lecture Notes in Computer Science, vol 2799. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39762-5_26
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DOI: https://doi.org/10.1007/978-3-540-39762-5_26
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