Abstract
This paper presents an advance cell modeling technique based on polynomial expressions for physical and logic design. Till now, there lacks a modeling method to handle multiple operating points such as input slew, output capacitance, voltage, process, temperature, etc. at a time for the logic synthesis and physical design. Our novel curve-fitting algorithm for cell modeling can process a table with thousands of data points in a modeling equation compared to piecewise equations used in the existing methods [1]-[4]. The number of data storage and CPU run time are significantly reduced without compromising the accuracy of the data. This ensures that the novel curve-fitting algorithm can exactly recover the original data points in a short period of time. In addition, the table-partitioning algorithm is developed to reduce the number of storage and flatten the peak situation occurring at some of the unsampled data. Furthermore, in order to filter the “pass" points with 99% of all data points, the algorithm is developed to select the best order for input variables, further causes to shorten CPU run time again. Our benchmark shows that the new approach has significantly better accuracy and less storage for both the sampling data and unsampling data.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Wang, F., Chang, S.-S.: Scalable Delay Model for Logic and Physical Synthesis. In: The 16th IFIP World Computer Congress, ICDA on VLSI Systems, August 2000, vol. 7(4) (December 1999)
Chang, S.-S.: Liberty Technology Rollout 2000.11. In: Synopsys Liberty Extensions for Physical Design (2000)
Reference Manual, Library Compiler User Guide, vol. 2, Synopsys (2000.11)
Chang, S.-S.: Liberty Updates: Physical Extension & Polynomial Approach. In: Synopsys ( April 3, 2001)
Press, W., Teukolsky, S., Vetterling, W., Flannery, B.: Numerical Recipes. Cambridge University Press, Cambridge (1989)
Robinson, E.A.: Least Squares Regression Analysis In Term of Linear Algebra. Goose Pond Press (1981)
Murugavel, A., et al.: Least-Square Estimation of Average Power in Digital CMOS Circuits. IEEE Transactions on VLSI System 10(1) (February 2002)
Murugavel, A.K., et al.: Average power in digital CMOS circuits using least square estimation. In: Int. Conf. VLSI Design, pp. 215–220 (2001)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2003 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Shiue, WT., Wanalertlak, W. (2003). Advanced Cell Modeling Techniques Based on Polynomial Expressions. In: Chico, J.J., Macii, E. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2003. Lecture Notes in Computer Science, vol 2799. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39762-5_61
Download citation
DOI: https://doi.org/10.1007/978-3-540-39762-5_61
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-20074-1
Online ISBN: 978-3-540-39762-5
eBook Packages: Springer Book Archive