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TDL: A Hardware Description Language for Retargetable Postpass Optimizations and Analyses

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Generative Programming and Component Engineering (GPCE 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2830))

Abstract

The hardware description language Tdl has been designed with the goal to generate machine-dependent postpass optimizers and analyzers from a concise specification of the target processor. Tdl is assembly-oriented and provides a generic modeling of irregular hardware constraints that are typical for many embedded processors. The generic modeling supports graph-based and search-based optimization algorithms. An important design goal of Tdl was to achieve extendibility, so that Tdl can be easily integrated in different target applications. Tdl is at the base of the Propan system that has been developed as a retargetable framework for high-quality code optimizations at assembly level. For two contemporary microprocessors, the Analog Devices SHARC 2106x, and the Philips TriMedia TM1000, significant improvements of the code produced by production-quality compilers could be achieved with short retargeting time. Tdl has also been used for implementing postpass optimizations for the Infineon C16x/ST10 processor that are part of a commercial postpass optimizer. Tdl specifications are concise and can be produced in short time.

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Kästner, D. (2003). TDL: A Hardware Description Language for Retargetable Postpass Optimizations and Analyses. In: Pfenning, F., Smaragdakis, Y. (eds) Generative Programming and Component Engineering. GPCE 2003. Lecture Notes in Computer Science, vol 2830. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39815-8_2

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  • DOI: https://doi.org/10.1007/978-3-540-39815-8_2

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-20102-1

  • Online ISBN: 978-3-540-39815-8

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