Event-Driven Traversal of Logic Circuits for Re-evaluation of Boolean Functions in Reactive Systems

Abstract

This paper presents an efficient algorithm for re-evaluation of a Boolean function represented as a logic circuit. The algorithm consists of pre-computation and re-evaluation parts. For a given logic circuit and initial input bits, the pre-computation constructs the data structure for the re-computation. The re-evaluation accepts a list of changed input bits and updates the output of the circuit. The pre-computation runs in time linear to size of the circuit and the re-computation performs in time linear to the number of triggered input bits.