Abstract
New non-HDL programming models for signal processing in FPGAs have focused primarily on building high-performance data paths. Along with the ability to construct sophisticated custom signal processors comes increased requirements for creating complex control circuitry. Recent enhancements to System Generator for DSP begin to address this need by providing mechanisms that include co-simulation interfaces to extend Simulink with HDL semantics, automatic compilation from Matlab m-code into Simulink and VHDL, and embedded microcontrollers. In this paper, we describe how such mechanisms can be used in a QAM receiver designed for a CCSDS standard.
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Ballagh, J. et al. (2003). Specifying Control Logic for DSP Applications in FPGAs. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_129
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DOI: https://doi.org/10.1007/978-3-540-45234-8_129
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