Efficient Bit Serial Multiplication in GF(2^m) for a Class of Finite Fields

Abstract

We propose a design of a bit serial multiplication by using an optimal normal basis of type II in a finite field GF(2^m), which has the properties of modularity, regularity and scalability. Our multiplier provides a fast and an efficient hardware architecture for various VLSI implementations such as smart cards and IC cards. We also show that the two operations xy and xy ², where x and y are in GF(2^m), can be computed simultaneously after m clock cycles in one shift register arrangement. Moreover, the related irreducible polynomial of our basis is very often primitive (approximately 80 percent of known examples). Therefore our multiplier is more suitable for a cryptographic purpose than the multipliers using an optimal normal basis of type I or an all one polynomial basis, where the related irreducible polynomials are never primitive polynomials.