Abstract
We present a hardware-algorithm for selecting the k-th smallest item among N elements (for all ranges of N) using a p-classifier device, while strictly enforcing conflict-free memory accesses. Specifically, we show that, by using our design, selection can be accomplished optimally in O(N / p) time.
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References
Knuth, D.E.: The Art of Computer Programming, vol. 3. Addison Wesley, Reading (1973)
Olariu, S., Pinotti, M.C., Zheng, S.Q.: An Optimal Hardware-Algorithm for Sorting Using a Fixed-Size Parallel Sorting Device. In: 10th IASTED Int’l Conference Parallelel And Distributed Computing and Systems, pp. 38–44 (1998)
Olariu, S., Pinotti, M.C., Zheng, S.Q.: An Optimal Hardware-Algorithm for Selection Using a Fixed-Size Parallel Classifier Device. Tech. Rep. IEI-CNR (1999)
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© 1999 Springer-Verlag Berlin Heidelberg
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Olariu, S., Pinotti, M.C., Zheng, S.Q. (1999). An Optimal Hardware-Algorithm for Selection Using a Fixed-Size Parallel Classifier Device. In: Banerjee, P., Prasanna, V.K., Sinha, B.P. (eds) High Performance Computing – HiPC’99. HiPC 1999. Lecture Notes in Computer Science, vol 1745. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-46642-0_42
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DOI: https://doi.org/10.1007/978-3-540-46642-0_42
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-66907-4
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