Abstract
As FPGAs have increased in density, the demand for predefined intellectual property has risen. Rather than re-invent commonly used circuitry, libraries of standard parts have become available from a variety of sources. Currently, all of these offerings are based on the standard ASIC design flow and are used to produce fixed designs. This paper discusses Run-Time Parameterizable or RTP Cores which are an extension of the traditional static core model. Written in the Java (tm) programming language, RTP Cores are created at run-time and may be used to dynamically modify existing circuitry. In addition to providing support for run-time reconfigurable computing, RTP Cores permit run-time parameterization of designs. This adds flexibility and portablilty unavailable in existing design environments.
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References
Brebner, G.: The swappable logic unit: A paradigm for virtual hardware. In: Pocek, K.L., Arnold, J. (eds.) IEEE Symposium on FPGAs for Custom Computing Machines, pp. 77–86. IEEE Computer Society Press, Los Alamitos (1997)
Brebner, G.: Circlets: Circuits as applets. In: Pocek, K.L., Arnold, J. (eds.) IEEE Symposium on FPGAs for Custom Computing Machines, pp. 300–301. IEEE Computer Society Press, Los Alamitos (1998)
Chu, M., Weaver, N., Sulimma, K., DeHon, A., Wawrzynek, J.: Object oriented circuit generators in Java. In: Pocek, K.L., Arnold, J. (eds.) IEEE Symposium on FPGAs for Custom Computing Machines. IEEE Computer Society Press, Los Alamitos (1998)
Mencer, O., Morf, M., Flynn, M.J.: PAM-Blox: High Performancs FPGA Design for Adaptive Computing. In: Pocek, K.L., Arnold, J. (eds.) IEEE Symposium on FPGAs for Custom Computing Machines. IEEE Computer Society Press, Los Alamitos (1998)
Guccione, S.A., Levi, D.: XBI: A Java-based interface to FPGA hardware. In: Schewel, J. (ed.) Configurable Computing Technology and its use in High Performance Computing, DSP and Systems Engineering, Proc. SPIE Photonics East, Bellingham, WA, November 1998. SPIE – The International Society for Optical Engineering (1998)
Hwang, J., Patterson, C., Mohan, S., Dellinger, E., Mitra, S., Wittig, R.: Generating layouts for self-implementing modules. In: Schewel, J. (ed.) Configurable Computing Technology and its use in High Performance Computing, DSP and Systems Engineering, Proc. SPIE Photonics East, Bellingham, WA, November 1998. SPIE – The International Society for Optical Engineering (1998)
Lechner, E., Guccione, S.A.: The Java environment for reconfigurable computing. In: Glesner, M., Luk, W. (eds.) FPL 1997. LNCS, vol. 1304, pp. 284–293. Springer, Heidelberg (1997)
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Guccione, S.A., Levi, D. (1999). Run-Time Parameterizable Cores. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_22
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DOI: https://doi.org/10.1007/978-3-540-48302-1_22
Publisher Name: Springer, Berlin, Heidelberg
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