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Implementing PhotoShopTM Filters in VirtexTM

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Field Programmable Logic and Applications (FPL 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1673))

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Abstract

This paper presents a complete system that utilises a FPGA-based co-processor to accelerate compute intensive image processing operations. Its main contributions are a methodology for incorporating hardware-based acceleration into a commercial image processing application by exploiting a plug-in architecture; a presentation of a new PCI-based FPGA accelerator system suited for image processing style applications; and theoretical calculations and empirical measurements of the system that was actually built.

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References

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© 1999 Springer-Verlag Berlin Heidelberg

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Ludwig, S., Slous, R., Singh, S. (1999). Implementing PhotoShopTM Filters in VirtexTM . In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_24

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  • DOI: https://doi.org/10.1007/978-3-540-48302-1_24

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-66457-4

  • Online ISBN: 978-3-540-48302-1

  • eBook Packages: Springer Book Archive

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