Abstract
This paper details the development, implementation, and results ofSynthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach uses a novel FSM decomposition technique, which partitions both the states of a machine and its inputs between several sub-machines. The technique developed exploits incomplete output specifications in order to minimize the interconnect complexity of the resulting network, and uses a custom Genetic Algorithm to explore the space of possible partitions. User-controlled trade-off between logic depth and logic area is allowed, and the algorithm itself during execution determines the number of sub-FSMs in the resulting decomposition. The results from MCNC benchmarks applied to Xilinx XC4000 and Altera FLEX8000 devices are presented.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Hartmanis, J., Stearns, R.E.: Algebraic Structure Theory of Sequential Machines. Prentice-Hall, Inc., Englewood Cliffs (1966)
Ashar, P., Devadas, S., Newton, A.R.: Sequential Logic Synthesis. Kluwer Academic Publishers, Dordrecht (1992)
Feske, K., Mulka, S., Koegst, M., Elst, G.: Technology-Driven FSM Partitioning for Synthesis of Large Sequential Circuits Targeting Lookup-Table Based FPGAs. In: Glesner, M., Luk, W. (eds.) FPL 1997. LNCS, vol. 1304, Springer, Heidelberg (1997)
Yang, W.L., Owens, R.M., Irwin, M.J.: Multi-way FSM decomposition based on interconnect complexity. In: Proc. EURO-DAC 1993, pp. 390–395. IEEE, Piscataway (1993)
Kuo, M.T., Liu, L.T., Cheng, C.K.: Finite State Machine Decomposition for I/O Minimization. In: Proc. ISCAS 1995, vol. 2, pp. 1061–1064. IEEE, Piscataway (1995)
Xilinx XC4000 Data Book, Xilinx Inc., San Jose (1991)
FLEX8000 Handbook, Altera Corp., San Jose (1994)
Yang, W.L., Owens, R.M., Irwin, M.J.: FPGA-based synthesis of FSMs through decomposition. In: Proc. GLSV 1994, pp. 97–100. IEEE, Piscataway (1994)
Sentovich, E.M., Singh, K.J., Lavagno, L., Moon, C., Murgai, R., Saldanha, A., Savoj, H., Stephen, P.R., Brayton, R.K., Sangiovanni-Vincentelli, A.: SIS: A System for Sequential Circuit Synthesis. UCB/ERL M92/41 Memorandum, Berkeley (1992)
Murgai, R., Brayton, R.K., Sangiovanni-Vincentelli, A.: Logic Synthesis for Field Programmable Gate Arrays. Kluwer Academic Publishers, Dordrecht (1995)
Lin, B., Newton, A.R.: Synthesis of Multiple Level Logic from Symbolic High- Level Description Languages. In: Proc. VLSI 1989, Munich (1989)
FPGA Express Online Help. Synopsys, Inc
Xilinx Foundation Tools Online Help. Xilinx, Inc
Max+Plus II Online Help. Altera Corp
Synplify Users Manual. Synplicity, Inc. Sunnyvale (1998)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1999 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Constantinides, G.A., Cheung, P.Y.K., Luk, W. (1999). Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_33
Download citation
DOI: https://doi.org/10.1007/978-3-540-48302-1_33
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-66457-4
Online ISBN: 978-3-540-48302-1
eBook Packages: Springer Book Archive