Abstract
Reed-Solomon codes are widely used in communications as well as in data storage for the correction of errors due to channel noise. In this paper we present a comparison between implementations of the Berlekamp-Massey algorithm and the Fitzpatrick algorithm. Both algorithms were synthesised and implemented on an FPGA and compared in terms of area, speed and routability. The modules can be used as part of a core-based design for Reed-Solomon decoders.
The research presented in this paper has been supported by Silicon Systems Limited and Forbairt under Applied Research Scheme Grant HE/97/302
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Lin, S., Costello, D.J.: Error control coding: fundamentals and applications. Prentice Hall, Englewood Cliffs (1983)
Wicker, S.B., Bhargava, V.K.: Reed-Solomon codes and their applications. IEEE Press, Los Alamitos (1994)
Fitzpatrick, P., Flynn, J.: A Gröbner basis technique for Padé approximation. Journal of Symbolic Computation 13, 133–138 (1992)
Fitzpatrick, P.: New time domain errors and erasures decoding algorithm for BCH codes. Electronics Letters 30, 110–111 (1994)
Fitzpatrick, P.: On the key equation. IEEE Trans. on Information Theory 41, 1290–1302 (1995)
Fitzpatrick, P., Jennings, S.M.: Comparison of two algorithms for decoding alternant codes. To appear in Applicable Algebra in Engineering, Communication and Computing 9, 211–220 (1998)
Blahut, R.E.: Theory and practice of error control codes. Addison-Wesley, Reading (1983)
Popovici, E.M., Fitzpatrick, P.: Reed-Solomon decoders for the read-write channels, IEE Systems on a Chip Colloquium Digest, 9.1–9.5 (September 1998)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1999 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Popovici, E.M., Fitzpatrick, P., Murphy, C.C. (1999). FPGA Design Trade-Offs for Solving the Key Equation in Reed-Solomon Decoding. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_37
Download citation
DOI: https://doi.org/10.1007/978-3-540-48302-1_37
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-66457-4
Online ISBN: 978-3-540-48302-1
eBook Packages: Springer Book Archive