Abstract
In this paper a distributed framework for evolvable hardware system design is presented. This framework allows the automatic evolution of digital circuits through the use of evolvable hardware and offers distribution of the evolutionary algorithm and fitness evaluation resources. The system is scalable and permits evolution of circuits over a wide range of complexities, with the use of a layered approach offering architecture independence. An illustration of the system is given where a circuit is automatically evolved for a classical signal processing problem.
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© 1999 Springer-Verlag Berlin Heidelberg
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Slorach, C., Fulton, S., Sharman, K. (1999). A Distributed, Scalable, Multi-layered Approach to Evolvable System Design Using FPGA’s. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_60
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DOI: https://doi.org/10.1007/978-3-540-48302-1_60
Publisher Name: Springer, Berlin, Heidelberg
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