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Double-Size Bipartite Modular Multiplication

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Information Security and Privacy (ACISP 2007)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 4586))

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Abstract

This paper proposes new techniques of double-size bipartite multiplications with single-size bipartite modular multiplication units. Smartcards are usually equipped with crypto-coprocessors for accelerating the computation of modular multiplications, however, their operand size is limited. Security institutes such as NIST and standards such as EMV have recommended or forced to increase the bit-length of RSA cryptography over years. Therefore, techniques to compute double-size modular multiplications with single-size modular multiplication units has been studied this decade to extend the life expectancy of the low-end devices. We propose new double-size techniques based on multipliers implementing either classical or Montgomery modular multiplications, or even both simultaneously (bipartite modular multiplication), in which case one can potentially compute modular multiplications twice faster.

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Authors and Affiliations

  1. Hitachi, Ltd., Systems Development Laboratory, Kawasaki, Japan

    Masayuki Yoshino, Katsuyuki Okeya & Camille Vuillaume

Authors
  1. Masayuki Yoshino
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  2. Katsuyuki Okeya
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  3. Camille Vuillaume
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Josef Pieprzyk Hossein Ghodosi Ed Dawson

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Yoshino, M., Okeya, K., Vuillaume, C. (2007). Double-Size Bipartite Modular Multiplication. In: Pieprzyk, J., Ghodosi, H., Dawson, E. (eds) Information Security and Privacy. ACISP 2007. Lecture Notes in Computer Science, vol 4586. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73458-1_18

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  • DOI: https://doi.org/10.1007/978-3-540-73458-1_18

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-73457-4

  • Online ISBN: 978-3-540-73458-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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