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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4599))

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Abstract

This paper proposes a multithreaded Java processor as an IP core for Altera’s System-on-Programmable-Chip environment. The processor core is an enhancement of the earlier developed multithreaded Java processor named Komodo. It features a real-time capable garbage collection and integrated real-time scheduling schemes. Hence, it is suitable for embedded hard, soft, and non real-time systems. The facts that the processor is designed as an IP core and that it is a special Java processor makes both easier: hardware design and software development.

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References

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Stamatis Vassiliadis Mladen Bereković Timo D. Hämäläinen

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© 2007 Springer-Verlag Berlin Heidelberg

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Uhrig, S., Mische, J., Ungerer, T. (2007). An IP Core for Embedded Java Systems. In: Vassiliadis, S., Bereković, M., Hämäläinen, T.D. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2007. Lecture Notes in Computer Science, vol 4599. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73625-7_28

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  • DOI: https://doi.org/10.1007/978-3-540-73625-7_28

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-73622-6

  • Online ISBN: 978-3-540-73625-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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