Abstract
Fast Fourier Transform (FFT) is the most basic and essential operation performed in Software Defined Radio (SDR). Thus designing regular, reconfigurable, modular, low hardware and timing-complexity FFT computation block is very important. A single FFT block should be configurable for varying length FFT computation and also for computation of different transforms like Discrete cosine/sine transform (DCT/DST) etc. In this paper, the authors analyze area, timing complexity and noise to signal Ratio (NSR) of Bruun’s FFT w.r.t. classical FFT from a SDR perspective. It is shown that architecture of Bruun’s FFT is ideally suited for SDR and may be used in preference over classical FFT for most practical cases. A detailed comparison of Bruun’s and classical FFT hardware architectures for same NSR is carried out and results of FPGA implementation are discussed.
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Mittal, S., Khan, M.Z.A., Srinivas, M.B. (2007). A Comparative Study of Different FFT Architectures for Software Defined Radio. In: Vassiliadis, S., Bereković, M., Hämäläinen, T.D. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2007. Lecture Notes in Computer Science, vol 4599. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73625-7_39
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DOI: https://doi.org/10.1007/978-3-540-73625-7_39
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-73622-6
Online ISBN: 978-3-540-73625-7
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