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Address-Free All-to-All Routing in Sparse Torus

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Parallel Computing Technologies (PaCT 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4671))

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Abstract

In this work we present a simple network design for all-to-all routing and study deflection routing on it. We present a time-scheduled routing algorithm where packets are routed address-free. We show that a total exchange relation, where every processor has a packet to route to every other processor, can be routed with routing cost of 1/2 + o(1) time units per packet.

The network consists of an n-sided d-dimensional torus, where the n d − 1 processor (or input/output) nodes are sparsely but regularly situated among n d − n d − 1 deflection routing nodes, having d input and d output links. The finite-state routing nodes change their states by a fixed, preprogrammed pattern.

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References

  1. Azizoglu, M.C., Egecioglu, Ö.: Lower Bounds on Communication Loads and Optimal Placements in Torus Networks. IEEE Trans. Comput 49(3), 259–266 (2000)

    Article  MathSciNet  Google Scholar 

  2. Blaum, M., Bruk, J., Pifarre, G.D., Santz, J.L.C.: On Optimal Placements of Processors in Tori Networks. In: Proceedings, Eighth IEEE Symposium on Parallel and Distributed Processing, pp. 552–555. IEEE Computer Society Press, Los Alamitos (1996)

    Google Scholar 

  3. Goldberg, L.A., Matias, Y., Rao, S.: An Optical Simulation of Shared Memory. In: SPAA 1994, 6th Annual Symposium on Parallel Algorithms and Architectures, Cape May, New Jersey, pp. 257–267 (June 1994)

    Google Scholar 

  4. Honkanen, R., Leppänen, V., Penttonen, M.: Hot-Potato Routing Algorithms for Sparse Optical Torus. In: Proceedings, International Conference of Parallel Parallel Processing, ICPP 2001, pp. 302–307 (2001)

    Google Scholar 

  5. Leppänen, V., Penttonen, M.: Work-Optimal Simulation of PRAM Models on Meshes. Nordic Journal on Computing 2(1), 51–69 (1995)

    Google Scholar 

  6. Suel, S.T., Tsantilas, T.: Efficient Communication Using Total-Exchange. In: em 9th International Parallel Processing Symposium IPPS 1995 (1995)

    Google Scholar 

  7. Schuster, A.: Bounds and Analysis Techniques for Greedy Hot-Potato Routing, ch. 11, pp. 283–354. Kluwer Academic Publishers, Boston (1997)

    Google Scholar 

  8. Sibeyn, J.: Solving Fundamental Problems on Sparse-Meshes. IEEE Trans. Parallel Distrib. Syst. 11(12), 1324–1332 (2000)

    Article  Google Scholar 

  9. Valiant, L.G.: General Purpose Parallel Architectures. In: Algorithms and Complexity, Handbook of Theoretical Computer Science, vol. A, pp. 943–971 (1990)

    Google Scholar 

  10. Vitányi, P.M.B.: Locality, Communication, and Interconnect Length in Multicomputers. SIAM Journal on Computing 17(4), 659–672 (1988)

    Article  MATH  MathSciNet  Google Scholar 

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Victor Malyshkin

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© 2007 Springer-Verlag Berlin Heidelberg

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Honkanen, R., Leppänen, V., Penttonen, M. (2007). Address-Free All-to-All Routing in Sparse Torus. In: Malyshkin, V. (eds) Parallel Computing Technologies. PaCT 2007. Lecture Notes in Computer Science, vol 4671. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-73940-1_21

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  • DOI: https://doi.org/10.1007/978-3-540-73940-1_21

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-73939-5

  • Online ISBN: 978-3-540-73940-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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