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Low Power Elliptic Curve Cryptography

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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (PATMOS 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4644))

Abstract

The designer of an elliptic curve processor is faced with many design choices that include the algorithm and coordinate system to be used. The power consumption of elliptic curve processors is becoming increasingly important as such processors find new uses in power constrained environments. This paper studies the effect that algorithm and coordinate choices have on the power consumption and energy per point multiplication of an FPGA based, reconfigurable elliptic curve processor.

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Author information

Authors and Affiliations

  1. Dept. of Electrical and Electronic Engineering, University College Cork, Cork City, Ireland

    Maurice Keller & William Marnane

Authors
  1. Maurice Keller
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  2. William Marnane
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Editor information

Nadine Azémard Lars Svensson

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© 2007 Springer-Verlag Berlin Heidelberg

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Keller, M., Marnane, W. (2007). Low Power Elliptic Curve Cryptography. In: Azémard, N., Svensson, L. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74442-9_30

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  • DOI: https://doi.org/10.1007/978-3-540-74442-9_30

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-74441-2

  • Online ISBN: 978-3-540-74442-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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