Abstract
A power-aware voltage-scheduling heuristic is presented for a hard real-time multi-processor system. Given a task graph, the offline component first allocates a certain percentage of worst-case execution units of some tasks to them as potions to be executed in a higher voltage. Once some path is speeded up, the rest of the offline component chooses and speeds up one of the paths sharing tasks with that path. The online component reclaims the slack, which occurs when some task actually finishes, to slow down the execution speed of its successor. Experimental results are finally provided to demonstrate the effectiveness of the proposed heuristic.
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Hariyama, M., Aoyama, T., Kameyama, M.: Genetic Approach to Minimizing Energy Consumption of VLSI Processors Using Multiple Supply Voltages. IEEE Trans. on Comput. 54(16), 642–650 (2005)
Burd, T.D., Pering, T.A., Stratakos, A.J., Brodersen, R.W.: A Dynamic Voltage Scaled Microprocessor System. IEEE Journal of Solid-State Circuits 35(11), 1571–1580 (2000)
Hong, I., Potkonjak, M., Srivastava, M.: On-line Scheduling of Hard Real-Time Tasks on Variable Voltage Processor. In: Proc. of International Conference on Computer Aided Design, pp. 653–656 (1998)
Pering, T., Burd, T., Brodersen, R.: Voltage Scheduling in the lparm Microprocessor System. In: Proc. of Int. Symp. on Low-Power Electronics and Design, pp. 96–101 (2000)
Krishna, C.M., Lee, Y.-H.: Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time System. IEEE Trans. on Comput. 52(12), 1586–1593 (2003)
Barnett, J.A.: Dynamic Task-Level Voltage Scheduling Optimizations. IEEE Trans. on Comput. 54(5), 508–520 (2005)
Gruian, F., Kuchcinski, K.: Lenes: Task-Scheduling for Low-Energy Systems Using Variable Voltage Processors. In: Proc. of Asia South Pacific-Design Automation Conference, pp. 449–455 (2001)
Zhang, Y., Hu, X., Chen, D.Z.: Task Scheduling and Voltage Selection for Energy Minimization. In: Proc. of the 39th Design Automation Conference, pp. 183–188 (2002)
Mishra, R., Rastogi, N., Zhu, D., Mossé, D., Melhem, R.: Energy Aware Scheduling for Distributed Real-Time Systems. In: Proc. of Int. Parallel and Distributed Processing Symposium, pp. 22–26 (2003)
Zhu, D., Melhem, R., Childers, B.R.: Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multi-processor Real-Time Systems. In: Proc. of IEEE Real-Time Systems Symposium, pp. 84–92. IEEE Computer Society Press, Los Alamitos (2001)
Zhu, D., AbouGhazaleh, N., Mossé, D., Melhem, R.: Power Aware Scheduling for AND/OR Graphs in Multi-processor Real-Time Systems. In: Proc. of Int. Conference on Parallel Processing, pp. 593–601 (2002)
Roychowdhury, D., Koren, I., Krishna, C.M., Lee, Y.-H.: A Voltage Scheduling Heuristic for Real-Time Task Graphs. In: Proc. of the Performance and Dependability Symposium, pp. 741–750 (2003)
Chandrakasan, A.P., Sheng, S., Brodersen, R.W.: Low Power CMOS Digital Design. IEEE Journal of Solid-State Circuits 27(4), 473–484 (1992)
Ishihara, T., Yasuura, H.: Voltage Scheduling Problem for Dynamically Variable Voltage Processors. In: Proc. of Int. Symp. on Low-Power Electronics and Design, pp. 197–201 (1998)
Yang, T., Gerasoulis, A.: List Scheduling with and without Communication Delays. Parallel Computing 19(12), 1321–1344 (1993)
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Kamiura, N., Isokawa, T., Matsui, N. (2007). On Two-Pronged Power-Aware Voltage Scheduling for Multi-processor Real-Time Systems. In: Azémard, N., Svensson, L. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74442-9_41
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DOI: https://doi.org/10.1007/978-3-540-74442-9_41
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