Skip to main content

Research on Fault-Tolerance of Analog Circuits Based on Evolvable Hardware

  • Conference paper
Evolvable Systems: From Biology to Hardware (ICES 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4684))

Included in the following conference series:

Abstract

For electronic devices especially used in extreme-environment, it is very important to ensure high-reliability and long-lifetime operation; so it is significant to develop fault-tolerant mechanisms by adopting evolutionary algorithm. Based on EHW (evolvable hardware), this paper presents a new FPACA (field programmable analog cell array) which is an evolution-oriented reconfigurable architecture and can implement evolution of both analog and digital functions. Adopting single-chromosome evolutionary algorithm, we establish evolutionary reconfiguration mechanism to research the fault- tolerance of evolutionary analog circuits, such as amplifiers, filters or DAC (digital to analog converters). Comparing to FPTA, FPACA has the advantages of low hardware cost and convenience of software analysis and simulation. By implementing a typical amplifier circuit, we illustrate the fault-tolerance of FPACA analog circuits and the experimental results show the correctness and feasibility of FPACA.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Yao, X., Higuichi, T.: Promises and Challenges of Evolvable Hardware. IEEE Trans. On Systems Man and Cybernetics-Part C: Applications and Reviews 29, 87–97 (1999)

    Article  Google Scholar 

  2. Wang, Y., Zhang, Z., Cui, J., Chen, Z.: The Architecture and Circuital Implementation Scheme of A New Cell Neural Network for Analog Signal Processing. In: Pre-proceedings of the International Conference Bio-Inspired Computing - Theory and Applications, Wuhan, China, pp. 374–380 (2006)

    Google Scholar 

  3. Stoica, A., Zebulum, R.S., Keymeulen, D., Daud, T.: Transistor-Level Circuit Experiments Using Evolvable Hardware. In: Mira, J.M., Álvarez, J.R. (eds.) IWINAC 2005. LNCS, vol. 3562, pp. 366–375. Springer, Heidelberg (2005)

    Google Scholar 

  4. Stoica, A., Keymeulen, D., Arslan, T., Duong, V., Zebulum, R.S., Ferguson, I., Guo, X.: Circuit Self-Recovery Experiments in Extreme Environments. In: Proceedings of the 2004 NASA/DoD Conference on Evolution Hardware, Seattle, WA, USA, pp. 142–145 (2004)

    Google Scholar 

  5. Stoica, A., Keymeulen, D., Zebulum, R.S., Thakoor, A., Daud, T., Klimeck, G., Jin, Y., Tawel, R., Duong, V.: Evolution of Analog Circuits on Field Programmable Transistor Arrays. In: Proc. of the Second NASA/DOD Workshop on Evolvable Hardware, pp. 99–108. IEEE Computer Society Press, Los Alamitos (2000)

    Chapter  Google Scholar 

  6. Ricardo, S., Zebulum, R.S., Keymeulen, D., Duong, V., Guo, X., Ferguson, M.I., Stoica, A.: Experimental Results in Evolutionary Fault-Recovery for Field Programmable Analog Devices. In: Proceedings of The 2003 NASA/Dod Conference on Evolvable Hardware, Chicago, IL, USA, pp. 182–186 (2003)

    Google Scholar 

  7. Stoica, A., Zebulum, R., Keymeulen, D.: Progress and Challenges in Building Evolvable Devices. In: Proceedings of The Third NASA/DoD Workshop on Evolvable Hardware, Long Beach, CA, USA, pp. 33–35 (2001)

    Google Scholar 

  8. Levi, D.: HereBoy: a fast evolutionary algorithm Evolvable Hardware. In: Proceedings of The Second NASA/DoD Workshop on Evolvable Hardware, Palo Alto, CA, USA, pp. 17–24 (2000)

    Google Scholar 

  9. Stoica, A., Zebulum, R., Keymeulen, D., Tawel, R., Daud, T., Thakoor, A.: Reconfigurable VLSI Architectures for Evolvable Hardware: from Experimental Field Programmable Transistor Arrays to Evolution-Oriented Chips. IEEE Transactions on VLSI Systems 9, 227–232 (2001)

    Article  Google Scholar 

  10. Stoica, A., Keymeulen, D., Tawel, R., Salazar, C., Li, W.T.: Evolutionary Experiments with a Fine-grained Reconfigurable Architecture for Analog and Digital CMOS Circuits. In: Proceedings of the First NASA/DoD Workshop on Evolvable Hardware, Pasadana, pp. 76–84. IEEE Computer Society Press, Los Alamitos (1999)

    Chapter  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Lishan Kang Yong Liu Sanyou Zeng

Rights and permissions

Reprints and permissions

Copyright information

© 2007 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Ji, Q., Wang, Y., Xie, M., Cui, J. (2007). Research on Fault-Tolerance of Analog Circuits Based on Evolvable Hardware. In: Kang, L., Liu, Y., Zeng, S. (eds) Evolvable Systems: From Biology to Hardware. ICES 2007. Lecture Notes in Computer Science, vol 4684. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74626-3_10

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-74626-3_10

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-74625-6

  • Online ISBN: 978-3-540-74626-3

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics