Skip to main content

Membrane Computing in Connex Environment

  • Conference paper
Membrane Computing (WMC 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4860))

Included in the following conference series:

Abstract

The Connex technology is presented as a possible way to implement efficiently membrane computations in silicon environment. The opportunity is offered by the recent trend of promoting the parallel computation as a real competitor on the consumer market. The Connex environment has an integral parallel architecture, which is introduced here and its main performances are presented. Some suggestions are provided about how to use the Connex environment as accelerator for membrane computation.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Andonie, R., Maliţa, M.: The Connex Array as a Neural Network Accelerator. In: Third IASTED International Conference on Computational Intelligence, 2007, Bannf, Alberta, Canada, July 2-4, 2007 (accepted, 2007)

    Google Scholar 

  2. Asanovic, K., et al.: The Landscape of Parallel Computing Research: A View from Berkeley, Technical Report No. UCB/EECS-2006-183 (December 18, 2006)

    Google Scholar 

  3. Borkar, S.Y., et al.: Platform 2015: Intel Processor and Platform Evolution for the Next decade, Intel Corporation (2005)

    Google Scholar 

  4. Dubey, P.: A Platform 2015 Workload Model: Recognition, Mining and Synthesis Moves Computers to the Era of Tera, Intel Corporation (2005)

    Google Scholar 

  5. Flynn, M.J.: Some computer organization and their affectiveness. IEEE Trans. Comp. C21(9), 948–960 (1972)

    Article  MathSciNet  Google Scholar 

  6. Hennessy, J.L., Patterson, D.A.: Computer Architecture. A Quantitative Approach, 4th edn. Morgan Kaufmann, San Francisco (2007)

    Google Scholar 

  7. Kleene, S.C.: General Recursive Functions of Natural Numbers. Math. Ann. 112 (1936)

    Google Scholar 

  8. Maliţa, M., Ştefan, G., Stoian, M.: Complex vs. Intensive in Parallel Computation. In: International Multi-Conference on Computing in the Global Information Technology - Challenges for the Next Generation of IT&C - ICCGI 2006, Bucharest, Romania (August 1-3, 2006)

    Google Scholar 

  9. Mîţu, B.: private communication

    Google Scholar 

  10. Păun, G.: Membrane Computing. An Introduction. Springer, Berlin (2002)

    MATH  Google Scholar 

  11. Păun, G.: Introduction to Membrane Computing. In: Ciobanu, G., Păun, G., Pérez-Jiménez, M.J. (eds.) Applications of Membrane Computing, ch. 1, Springer, Heidelberg (2006)

    Google Scholar 

  12. Ştefan, G.: The CA1024: A Massively Parallel Processor for Cost-Effective HDTV. In: SPRING PROCESSOR FORUM: Power-Efficient Design, Doubletree Hotel, San Jose, CA, May 15-17, 2006 and in SPRING PROCESSOR FORUM JAPAN, June 8-9, 2006, Tokyo (2006)

    Google Scholar 

  13. Ştefan, G., Sheel, A., Mîţu, B., Thomson, T., Tomescu, D.: The CA1024: A Fully Programable System-On-Chip for Cost-Effective HDTV Media Processing. In: Hot Chips: A Symposium on High Performance Chips, Memorial Auditorium, Stanford University (August 20-22, 2006)

    Google Scholar 

  14. Ştefan, G.: The CA1024: SoC with Integral Parallel Architecture for HDTV Processin. In: 4th International System-on-Chip (SoC) Conference & Exhibit, Radisson Hotel Newport Beach, CA (November 1-2, 2006)

    Google Scholar 

  15. Ştefan, G.: Integral Parallel Computation. In: Proceedings of the Romanian Academy. Series A: Mathematics, Physics, Technical Sciences, Information Science, vol. 7(3) (September-December 2006)

    Google Scholar 

  16. Thiébaut, D., Ştefan, G., Maliţa, M.: DNA search and the Connex technology. In: International Multi-Conference on Computing in the Global Information Technology - Challenges for the Next Generation of IT&C - ICCGI 2006, Bucharest, Romania (August 1-3, 2006)

    Google Scholar 

  17. Thiébaut, D., Maliţa, M.: Pipelining the Connex array. In: BARC 2007, Boston (January 2007)

    Google Scholar 

  18. Xavier, C., Iyengar, S.S.: Introduction to Parallel Algorithms. John Wiley & Sons, Inc., Chichester (1998)

    MATH  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

George Eleftherakis Petros Kefalas Gheorghe Păun Grzegorz Rozenberg Arto Salomaa

Rights and permissions

Reprints and permissions

Copyright information

© 2007 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Maliţa, M., Ştefan, G. (2007). Membrane Computing in Connex Environment. In: Eleftherakis, G., Kefalas, P., Păun, G., Rozenberg, G., Salomaa, A. (eds) Membrane Computing. WMC 2007. Lecture Notes in Computer Science, vol 4860. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-77312-2_5

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-77312-2_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-77311-5

  • Online ISBN: 978-3-540-77312-2

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics