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Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code

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Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 4899))

Abstract

This paper presents an approach to the efficient verification of embedded systems. Such systems usually operate in uncertain environments, giving rise to a high degree of nondeterminism in the corresponding formal models, which in turn aggravates the state explosion problem. Careful handling of nondeterminism is therefore crucial for obtaining efficient model checking tools. Here, we support this goal by developing a formal computation model and an abstraction method, called delayed nondeterminism, which instantiates nondeterministic values only if and when this is required by the application code. It is shown how this technique can be integrated into our CTL model checking tool [mc]square by introducing symbolic abstract states which represent several concrete states. We also give a simulation relation between the concrete and the abstract state space, thus establishing the soundness of delayed nondeterminism with respect to “path-universal” logics such as ACTL and LTL. Furthermore, a case study is presented in which three different programs are used to demonstrate the effectiveness of our technique.

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Karen Yorav

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Noll, T., Schlich, B. (2008). Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code. In: Yorav, K. (eds) Hardware and Software: Verification and Testing. HVC 2007. Lecture Notes in Computer Science, vol 4899. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-77966-7_16

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  • DOI: https://doi.org/10.1007/978-3-540-77966-7_16

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-77964-3

  • Online ISBN: 978-3-540-77966-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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