Abstract
For the memory intensive task of graph reduction, modern PCs are limited not by processor speed, but by the rate that data can travel between processor and memory. This limitation is known as the von Neumann bottleneck. We explore the effect of widening this bottleneck using a special-purpose graph reduction machine with wide, parallel memories. Our prototype machine – the Reduceron – is implemented using an FPGA, and is based on a simple template-instantiation evaluator. Running at only 91.5MHz on an FPGA, the Reduceron is faster than mature bytecode implementations of Haskell running on a 2.8GHz PC.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Augustsson, L.: BWM: A Concrete Machine for Graph Reduction. In: Proceedings of the 1991 Glasgow Workshop on Functional Programming, London, UK, pp. 36–50. Springer, Heidelberg (1992)
Burn, G.L., Peyton Jones, S.L., Robson, J.D.: The spineless G-machine. In: LFP 1988: Proceedings of the 1988 ACM conference on LISP and functional programming, pp. 244–258. ACM, New York (1988)
Claessen, K.: Embedded Languages for Describing and Verifying Hardware. PhD Thesis, Chalmers University of Technology (2001)
Coutts, D., Stewart, D., Leshchinskiy, R.: Rewriting haskell strings. In: Hanus, M. (ed.) PADL 2007. LNCS, vol. 4354, pp. 50–64. Springer, Heidelberg (2006)
Fenichel, R.R., Yochelson, J.C.: A LISP garbage-collector for virtual-memory computer systems. Commun. ACM 12(11), 611–612 (1969)
Golubovsky, D., Mitchell, N., Naylor, M.: Yhc.Core - from Haskell to Core. The Monad.Reader (7), 45–61 (2007)
Hammond, K., Michelson, G. (eds.): Research Directions in Parallel Functional Programming. Springer, London (2000)
Hughes, R.J.M.: Super Combinators—A New Implementation Method for Applicative Languages. In: Proceedings of the 1982 ACM Symposium on Lisp and Functional Programming, Pittsburgh, pp. 1–10 (1982)
Jansen, J.M., Koopman, P., Plasmeijer, R.: Efficient interpretation by transforming data types and patterns to functions. In: Trends in Functional Programming, vol. 7, Intellect (2007)
Lysecky, R., Vahid, F.: A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning. In: DATE 2005: Proceedings of the conference on Design, Automation and Test in Europe, Washington, DC, USA, pp. 18–23. IEEE Computer Society, Los Alamitos (2005)
Naylor, M.: A Recipe for Controlling Lego using Lava. The Monad.Reader (7), 5–21 (2007)
Riis Nielson, H., Nielson, F.: Semantics with Applications: A Formal Introduction. Wiley, Chichester (1992)
University of York. PRESENCE-3 Development, http://www.cs.york.ac.uk/arch/neural/hardware/presence-3/
Peyton Jones, S.: The Implementation of Functional Programming Languages. Computer Science. Prentice-Hall, Englewood Cliffs (1987)
Scheevel, M.: NORMA: a graph reduction processor. In: LFP 1986: Proceedings of the 1986 ACM conference on LISP and functional programming, pp. 212–219. ACM, New York (1986)
Stoye, W.: The Implementation of Functional Languages using Custom Hardware. PhD Thesis, University of Cambridge (1985)
The Yhc Team. The York Haskell Compiler - user’s guide (February 2007), http://www.haskell.org/haskellwiki/Yhc
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Naylor, M., Runciman, C. (2008). The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA. In: Chitil, O., Horváth, Z., Zsók, V. (eds) Implementation and Application of Functional Languages. IFL 2007. Lecture Notes in Computer Science, vol 5083. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85373-2_8
Download citation
DOI: https://doi.org/10.1007/978-3-540-85373-2_8
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-85372-5
Online ISBN: 978-3-540-85373-2
eBook Packages: Computer ScienceComputer Science (R0)