Abstract
The multiplexers are used in a wide range of applications. At present, they are controlled by binary signals. To reduce the number of interconnections, ternary signals are proposed to be used to control analog multiplexers/demulti-plexers. The analog multiplexers/demultiplexers are realized with CMOS transmission gates, their control circuits being designed using CMOS ternary inverters. The technology used to design ternary inverters is SUS-LOC. A 3-to-1 analog multiplexer is proposed in the design of a reconfigurable ternary inverter.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Fairchild Semiconductor, http://www.fairchildsemi.com/
On Semiconductor, http://www.onsemi.com/
STicroelectronics, http://www.st.com/stonline/
Hurst, S.L.: Multiple-valued logic - its status and its future. IEEE Transactions on Computers C-33(12), 1160–1179 (1984)
University of Surrey, Department of Electronic Engineering, http://www.ee.surrey.ac.uk/Projects/Labview/multiplexer/index.html
Khan, A.I., Nusrat, N., Khan, S.M., Hasan, M., Khan, M.H.A.: Quantum Realization of Some Ternary Circuits Using Muthukrishnan-Stroud Gates. In: Proc. of the 37th International Symposium on Multiple-Valued Logic ISMVL, p. 20 (2007)
Khan, M.H.A.: Design of reversible/quantum ternary multiplexer and demultiplexer. Engineering Letters 13(2), 65–69 (2006)
Chew, B.P., Mouftah, H.T.: On the design of CMOS ternary logic circuits using T-gates. International Journal of Electronics 63(2), 229–239 (1987)
Dhande, A.P., Ingole, V.T.: Design Of 3-Valued R-S & D Flip-Flops Based on Simple Ternary Gates. Proc. of World Academy of Sc., Eng.&Tech. 4, 1307–6884 (2005)
Uemura, T., Baba, T.: Demonstration of a novel multiple-valued T-gate usingmultiple- junction surface tunnel transistors and its application tothree-valued data flip-flop. In: Proc. of the 30th IEEE International Symposium on Multiple-Valued Logic, pp. 305–310 (2000)
Al-Rabadi, A.N.: Carbon Nano Tube (CNT) Multiplexers for Multiple-Valued Computing, Facta Universitatis. Ser.: Elec. Energ. 20(2), 175–186 (2007)
Jiang, E.H., Jiang, W.B.: Algebra Theory of RDSOP Forms of Ternary Logic Functions and Its Implementation with T-Gates. Chinese Journal of Comp. (7), 1132–1137 (2007)
Patent Storm http://www.patentstorm.us/patents/6133754-description.html
Olson, E.: Supplementary symmetrical logic circuit structure. In: Proceedings of the 29th IEEE International Symposium on Multiple-Valued Logic, pp. 42–47 (1999)
Omnibase Logic, http://www.omnibaselogic.com/
Wos, L., Pieper, G.W.: A Fascinating Country in the World of Computing: Your Guide to Automated Reasoning, p. 137. World Scientific, Singapore (1999)
Irisa, http://www.irisa.fr/cosi/SEMINAIRE/transparents/MVL-juin%202001.pdf
Srivastava, A., Venkatapathy, K.: Design and Implementation of a Low Power Ternary Full Adder. VLSI Design 4(1), 75–81 (1996)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Sipos, E., Festila, L., Oltean, G. (2008). Towards Reconfigurable Circuits Based on Ternary Controlled Analog Multiplexers/Demultiplexers. In: Lovrek, I., Howlett, R.J., Jain, L.C. (eds) Knowledge-Based Intelligent Information and Engineering Systems. KES 2008. Lecture Notes in Computer Science(), vol 5179. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85567-5_44
Download citation
DOI: https://doi.org/10.1007/978-3-540-85567-5_44
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-85566-8
Online ISBN: 978-3-540-85567-5
eBook Packages: Computer ScienceComputer Science (R0)