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Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation

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Evolvable Systems: From Biology to Hardware (ICES 2008)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5216))

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Abstract

The paper proposes a low density parity check (LDPC) code design system to facilitate the design of communication systems using LDPC codes for error correction. The proposed LDPC code design system has three advantages (utilization of MOGA to search codes, speed enhancement achieved through parallelization and FPGAs, and employment of more precise simulation models) and solves problems encountered when LDPC codes are used in practical applications. Preliminary evaluation results for the proposed system are presented, which demonstrate that the system can function successfully.

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Authors and Affiliations

  1. Toho University, 2-2-1 Miyama, Funabashi, Chiba, 274-8510, Japan

    Yukari Ishida, Hirotaka Nosato & Tatsumi Furuya

  2. National Institute of Advanced Industrial Science and Technology (AIST), Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki, 305-8568, Japan

    Eiichi Takahashi, Masahiro Murakawa, Isamu Kajitani & Tetsuya Higuchi

Authors
  1. Yukari Ishida
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  2. Hirotaka Nosato
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  3. Eiichi Takahashi
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  4. Masahiro Murakawa
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  5. Isamu Kajitani
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  6. Tatsumi Furuya
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  7. Tetsuya Higuchi
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Editor information

Editors and Affiliations

  1. NASA Ames Research Center, University of California Santa Cruz, UARC Mail Stop 269-3, CA 94035, Moffett Field, USA

    Gregory S. Hornby

  2. Faculty of Information Technology, Brno University of Technology, Bozetechova 2, 612 66, Brno, Czech Republic

    Lukáš Sekanina

  3. Faculty of Information Technology, Dept. of Computer and Information Science, Norwegian University of Science and Technology, 7491, Gloshaugen, Norway

    Pauline C. Haddow

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© 2008 Springer-Verlag Berlin Heidelberg

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Ishida, Y. et al. (2008). Proposal for LDPC Code Design System Using Multi-Objective Optimization and FPGA-Based Emulation. In: Hornby, G.S., Sekanina, L., Haddow, P.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2008. Lecture Notes in Computer Science, vol 5216. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85857-7_21

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  • DOI: https://doi.org/10.1007/978-3-540-85857-7_21

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-85856-0

  • Online ISBN: 978-3-540-85857-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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