Abstract
In this paper, a stepwise dimension reduction (SDR) approach to evolutionary design of relatively large combinational logic circuits is proposed. The proposed method divides the whole circuit into several layers. As for a circuit with one output, the number of input combinations is expected to be reduced layer-by-layer. The current layer’s outputs are the next layer’s inputs. All layers are evolved separately one after another, and assembled to form a final solution. The experimental results of SDR on parities, multipliers and circuits taken from MCNC library are comparable with those of GDD. Especially, the 19-parity circuit can be evolved successfully.
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Li, Z., Luo, W., Wang, X. (2008). A Stepwise Dimension Reduction Approach to Evolutionary Design of Relative Large Combinational Logic Circuits. In: Hornby, G.S., Sekanina, L., Haddow, P.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2008. Lecture Notes in Computer Science, vol 5216. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85857-7_5
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