Skip to main content

A Hardware-Software Design Framework for Distributed Cellular Computing

  • Conference paper
Evolvable Systems: From Biology to Hardware (ICES 2008)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5216))

Included in the following conference series:

  • 820 Accesses

Abstract

In this article, we describe a novel hardware-software design framework for prototyping cellular architectures in hardware. Based on an extensible platform of about 200 FPGAs, configured as a networked structure of processors, the hardware part of this computing framework is backed by an extensible library of software components that provides primitives for efficient inter-processor communication and distributed computation. This dual software–hardware approach allows a very quick exploration of different ways to solve computational problems using bio-inspired techniques. To demonstrate the validity of the method, we present an example of how a traditional parallel system such as a cellular automaton can be modeled and run with this perspective. In addition, we also show that the flexibility of our approach allows not only cellular automata but any computation to be easily implemented on a cellular substrate.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. Amde, M., Felicijan, T., Efthymiou, A., Edwards, D., Lavagno, L.: Asynchronous On-Chip Networks. IEE Proceedings Computers and Digital Techniques 152(02) (March 2005)

    Google Scholar 

  2. Bjerregaard, T., Mahadevan, S.: A survey of research and practices of Network-on-chip. ACM Comput. Surv. 38(1), 1 (2006)

    Article  Google Scholar 

  3. Corporaal, H.: Microprocessor Architectures: From VLIW to TTA. John Wiley & Sons, Inc., New York (1997)

    Google Scholar 

  4. Dally, W.J., Towles, B.: Route packets, not wires: on-chip inteconnectoin networks. In: DAC 2001: Proc. 38th Conf. on Design automation, pp. 684–689. ACM Press, New York (2001)

    Chapter  Google Scholar 

  5. de Micheli, G., Benini, L.: Networks on chip: A new paradigm for systems on chip design. In: DATE 2002: Proceedings of the conference on Design, automation and test in Europe, p. 418. IEEE Computer Society Press, Washington (2002)

    Google Scholar 

  6. Greensted, A., Tyrrell, A.: RISA: A hardware platform for evolutionary design. In: Proc. IEEE Workshop on Evolvable and Adaptive Hardware (WEAH 2007), Honolulu, Hawaii, April 2007, pp. 1–7 (2007)

    Google Scholar 

  7. Hoogerbrugge, J., Corporaal, H.: Transport-triggering vs. operation-triggering. In: Proc. 5th Intl. Conf. on Compiler Construction, pp. 435–449 (1994)

    Google Scholar 

  8. Moraes, F., Calazans, N., Mello, A., Möller, L., Ost, L.: HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integrated VLSI Journal 38(1), 69–93 (2004)

    Article  Google Scholar 

  9. Mudry, P.-A., Vannel, F., Tempesti, G., Mange, D.: Confetti: A reconfigurable hardware platform for prototyping cellular architectures. In: Proc. 2007 IEEE International Parallel and Distributed Processing Symposium (IPDPS 2007), p. 186. IEEE Computer Society Press, Los Alamitos (2007)

    Google Scholar 

  10. Mudry, P.-A., Zufferey, G., Tempesti, G.: A Dynamically Constrained Genetic Algorithm For Hardware-software Partitioning. In: Proc. of the 8th annual conf. on Genetic and evolutionary computation GECCO 2006, Seattle, pp. 769–776 (2006)

    Google Scholar 

  11. Ngouanga, A., Sassatelli, G., Torres, L., Gil, T., Soares, A., Susin, A.: A contextual resources use: a proof of concept through the APACHES platform. In: Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), April 2006, pp. 44–49 (2006)

    Google Scholar 

  12. Tempesti, G., Mange, D., Stauffer, A., Teuscher, C.: The BioWall: an electronic tissue for prototyping bio-inspired systems. In: Proc. 3rd Nasa/DoD Workshop on Evolvable Hardware. IEEE Computer Society Press, Los Alamitos

    Google Scholar 

  13. Tempesti, G., Mudry, P.-A., Hoffmann, R.: A Move Processor for Bio-Inspired Systems. In: Proc. NASA/DoD Conf. on Evolvable Hardware (EH 2005), pp. 262–271. IEEE Computer Society Press, Los Alamitos (2005)

    Chapter  Google Scholar 

  14. Thoma, Y., Tempesti, G., Sanchez, E., Moreno Arostegui, J.-M.: POEtic: An electronic tissue for bio-inspired cellular applications. BioSystems 74(1-3), 191–200 (2004)

    Article  Google Scholar 

  15. Upegui, A., Thoma, Y., Sanchez, E., Perez-Uribe, A., Moreno, J.M., Madrenas, J.: The perplexus bio-inspired reconfigurable circuit. In: Proc. 2nd NASA/ESA Conf. on Adaptive Hardware and Systems (AHS 2007), pp. 600–605. IEEE Computer Society Press, Los Alamitos (2007)

    Chapter  Google Scholar 

  16. Wiklund, D., Liu, D.: SoCBUS: Switched network on chip for hard real time embedded systems. In: IPDPS 2003: Proc. 17th Intl. Symposium on Parallel and Distributed Processing, p. 78.1. IEEE Computer Society Press, Los Alamitos (2003)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2008 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Mudry, PA., Ruffin, J., Ganguin, M., Tempesti, G. (2008). A Hardware-Software Design Framework for Distributed Cellular Computing. In: Hornby, G.S., Sekanina, L., Haddow, P.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2008. Lecture Notes in Computer Science, vol 5216. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85857-7_7

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-85857-7_7

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-85856-0

  • Online ISBN: 978-3-540-85857-7

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics