Abstract
This paper deals with a dependable computing system using a reconfigurable device. The work carried out for this purpose of this study involved the proposition of a fault-tolerant approach which covers microprocessors. TFT, which is short for tile-based fault tolerant approach, has the intermediate layer which makes the connection between physical circuit layout and logical circuit layout for use in partial and dynamic reconfiguration. The reconfiguration is effectively utilized for online replacement of failed circuits. An advantage of TFT is that there is no conflict with other fault-tolerant approaches, and therefore TFT is freely available in the construction of dependable systems.
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References
Cheatham, J.A., Emmert, J.M., Baumgart, S.: A survey of fault tolerant methodologies for FPGAs. ACM Trans. Des. Autom. Electron. Syst. 11(2), 501–533 (2006)
Swift, G.M.: Virtex-II Static SEU Characterization. XILINX Single Event Effects first Consortium Report (2004)
iRoC Technologies, Radiation results of the SER test of Actel, Xilinx and Altera FPGA instances (2004), http://www.actel.com/documents/OverviewRadResultsIROC.pdf
Quinn, H., Graham, P.: Terrestrial-Based Radiation Upsets: A Cautionary Tale. In: FCCM 2005, pp. 193–202 (2005)
Johnston, A.H., Swift, G.M., Shaw, D.C.: Impact of cmos scaling on single-event hard errors in space systems. In: Proc. of IEEE Symp. on Low Power Electronics, pp. 88–89 (October 1995)
White, M., Chen, Y.: Scaled cmos technology reliability users guide (March 2008)
Lesea, A., Percey, A.: Negative-bias temperature instability (nbti) effects in 90nm pmos, (November 2005), http://japan.xilinx.com/support/documentation/white_papers/wp224.pdf
Azizi, N., Yiannacouras, P.: Gate oxide breakdown (December 2003), http://citeseer.comp.nus.edu.sg/681500.html
Siewiorek, D.P., Swarz, R.S.: Theory and Practice of Reliable System Design. Digital Press, Bedford (1982)
Carmichael, C., Fuller, E., Fabula, J., Lima, F.D.: Proton testing of seu mitigation methods for the virtex fpga. In: Proc. of Int’l Conf. on Military and Aerospace Programmable Logic Devices (September 2001)
Lima, F., Carmichael, C., Fabula, J., Padovani, R., da Luz Reis, R.A.: A fault injection analysis of virtex fpga tmr design methodology. In: Proc. of Radiation and its Effects on Components and Systems, vol. 1, pp. 1–8 (2001)
XILINX Inc., XAPP290: Two Flows for Partial Reconfiguration: Module Based or Difference Based (September 2004)
XILINX Inc., XAPP290: Difference-Based Partial Reconfiguration (December 2007)
Kalte, H., Porrmann, M., Rückert, U.: System-on-programmable-chip approach enabling online fine-grained 1d-placement. In: Proc. of Int’l Symp. on Parallel and Distributed Processing, pp. 141–148 (April 2004)
Kawai, H., Yamaguchi, Y., Yasunaga, M.: Realization of the sound space environment for the radiation-tolerant space craft. In: ReConFig 2006, pp. 198–205 (September 2006)
SuperH RISC engine SH7040 series Sh7045, SH7044, SH7043, SH7042, SH7041, SH7040 Hardware Manual, 2nd edn., HITACHI, user Manual ADJ-602-128A (1997)
Aitch, T.: A Pipelined RISC CPU Aquarius (SuperH-2 ISA Compatible CPU Core) (July 2003), http://www.opencores.org/projects.cgi/web/aquarius/
Konishi, R., Ito, H., Nakada, H., Nagoya, A., Imlig, N., Shiozawa, T., Inamori, M., Nagami, K., Oguri, K.: PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. In: ASYNC 2001, Washington, DC, USA, p. 54 (2001)
Sugawara, T., Ide, K., Sato, T.: Dynamically Reconfigurable Processor Implemented with IPFlex’s DAPDNA Technology. IEICE Transactions on Information and Systems 87(8), 1997–2003 (2004)
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Kanamaru, A., Kawai, H., Yamaguchi, Y., Yasunaga, M. (2009). Tile-Based Fault Tolerant Approach Using Partial Reconfiguration. In: Becker, J., Woods, R., Athanas, P., Morgan, F. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2009. Lecture Notes in Computer Science, vol 5453. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00641-8_31
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DOI: https://doi.org/10.1007/978-3-642-00641-8_31
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