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Tile-Based Fault Tolerant Approach Using Partial Reconfiguration

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Reconfigurable Computing: Architectures, Tools and Applications (ARC 2009)

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Abstract

This paper deals with a dependable computing system using a reconfigurable device. The work carried out for this purpose of this study involved the proposition of a fault-tolerant approach which covers microprocessors. TFT, which is short for tile-based fault tolerant approach, has the intermediate layer which makes the connection between physical circuit layout and logical circuit layout for use in partial and dynamic reconfiguration. The reconfiguration is effectively utilized for online replacement of failed circuits. An advantage of TFT is that there is no conflict with other fault-tolerant approaches, and therefore TFT is freely available in the construction of dependable systems.

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© 2009 Springer-Verlag Berlin Heidelberg

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Kanamaru, A., Kawai, H., Yamaguchi, Y., Yasunaga, M. (2009). Tile-Based Fault Tolerant Approach Using Partial Reconfiguration. In: Becker, J., Woods, R., Athanas, P., Morgan, F. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2009. Lecture Notes in Computer Science, vol 5453. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00641-8_31

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  • DOI: https://doi.org/10.1007/978-3-642-00641-8_31

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-00640-1

  • Online ISBN: 978-3-642-00641-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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