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Efficient Hardware Architecture of SHA-256 Algorithm for Trusted Mobile Computing

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Information Security and Cryptology (Inscrypt 2008)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 5487))

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Abstract

We present a compact SHA-256 hardware architecture suitable for the Trusted Mobile Platform (TMP), which requires low-area and low-power characteristics. The built-in hardware engine to compute a hash algorithm in TMP is one of the most important circuit blocks and contributes the performance of the whole platform because it is used as key primitives supporting platform integrity and command authentication. Unlike personal computers, mobile platform have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore, special architecture and design methods for a compact hash hardware module are required. Our SHA-256 hardware can compute 512-bit data block using 8,588 gates on a 0.25μm CMOS process. The highest operation frequency and throughput of the proposed architecture are 136MHz and 142Mbps, which satisfies processing requirement for the mobile application.

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Kim, M., Ryou, J., Jun, S. (2009). Efficient Hardware Architecture of SHA-256 Algorithm for Trusted Mobile Computing. In: Yung, M., Liu, P., Lin, D. (eds) Information Security and Cryptology. Inscrypt 2008. Lecture Notes in Computer Science, vol 5487. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-01440-6_19

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  • DOI: https://doi.org/10.1007/978-3-642-01440-6_19

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-01439-0

  • Online ISBN: 978-3-642-01440-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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