Abstract
We present a new hybrid BDD and SAT-based algorithm for model checking. Our algorithm is based on backward search, where each pre-image computation consists of an efficient All-SAT procedure. The All-SAT procedure exploits a graph representation of the model to dynamically prune the search space, thus preventing unnecessary search in large sub-spaces, and for identifying independent sub-problems. Apart from the SAT mechanisms, BDD structures are used for storing the input to, and output of the pre-image computation. In this way, our hybrid approach enjoys the benefits of both worlds: on the one hand, basing the pre-image computation on SAT technology avoids expensive BDD quantification operations and the corresponding state space blow up. On the other hand, our model checking framework still enjoys the advantages of symbolic space reduction in holding intermediate images. Furthermore, our All-SAT analyzes the model and avoids redundant exploration of sub-spaces that are completely full with solutions, paying in these cases for the instantiation of a single assignment only.
We implemented our algorithm using the zChaff SAT solver and the CUDD BDD library. Experimental results show a potential for substantial improvement over existing model checking schemes.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
McMillan, K.L.: Applying SAT methods in unbounded symbolic model checking. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, p. 250. Springer, Heidelberg (2002)
Chauhan, P., Clarke, E.M., Kroening, D.: Using SAT based image computation for reachability analysis. Technical Report CMU-CS-03-151, Carnegie Mellon University (2003)
Grumberg, O., Schuster, A., Yadgar, A.: Memory efficient all-solutions sat solver and its application for reachability analysis. In: Hu, A.J., Martin, A.K. (eds.) FMCAD 2004. LNCS, vol. 3312, pp. 275–289. Springer, Heidelberg (2004)
Davis, M., Logemann, G., Loveland, D.: A machine program for theorem proving. CACMÂ 5(7) (July 1962)
Moskewicz, M., Madigan, C., Zhao, Y., Zhang, L., Malik, S.: Chaff: engineering an efficient SAT solver. In: 39th Design Aotomation Conference, DAC 2001 (2001)
Plaisted, D.: Method for design verification of hardware and non-hardware systems. United States Patents 6(131), 078 (2000)
Parthasarathy, G., Iyer, M.K., Cheng, K.-T., Wang, L.: Safety Property Verification Using Sequential SAT and Bounded Model Checking. IEEE Des. Test 21(2), 132–143 (2004)
Lu, F., Iyer, M.K., Parthasarathy, G., Wang, L.-C., Cheng, K.-T., Chen, K.-C.: An efficient sequential sat solver with improved search strategies. In: DATE (2005)
Iyer, M.K., Parthasarathy, G., Cheng, K.-T.: SATORI - A Fast Sequential SAT Engine for Circuits. In: ICCAD 2003 (2003)
Kuehlmann, A.: Dynamic Transition Relation Simplification for Bounded Property Checking. In: ICCAD 2004 (2004)
Jin, H., Somenzi, F.: Prime clauses for fast enumeration of satisfying assignments to boolean circuits. In: DAC 2005 (2005)
Gupta, A., Yang, Z., Ashar, P., Gupta, A.: SAT-based image computation with application in reachability analysis. In: Johnson, S.D., Hunt Jr., W.A. (eds.) FMCAD 2000. LNCS, vol. 1954, pp. 354–371. Springer, Heidelberg (2000)
Burch, J.R., Clarke, E.M., Long, D.E.: Symbolic model checking with partitioned transition relations. In: VLSI 1991 (1991)
Biere, A., Cimatti, A., Clarke, E.M., Fujita, M., Zhu, Y.: Symbolic model checking using SAT procedures instead of BDDs. In: DAC 1999 (1999)
Fujiwara, H., Shimono, T.: On the acceleration of test generation algorithms. IEEE Trans. Computers 32(12), 1137–1144 (1983)
Shtrichman, O.: Tuning SAT checkers for bounded model checking. In: CAV (2000), citeseer.nj.nec.com/shtrichman00tuning.html
Somenzi, F.: Cudd: Cu decision diagram package release (1998), citeseer.ist.psu.edu/somenzi98cudd.html
Heyman, T., Geist, D., Grumberg, O., Schuster, A.: A scalable parallel algorithm for reachability analysis of very large circuits. Formal Methods in System Design 21(3) (2002)
Lahiri, S.K., Bryant, R.E., Cook, B.: A symbolic approach to predicate abstraction. In: Hunt Jr., W.A., Somenzi, F. (eds.) CAV 2003. LNCS, vol. 2725, pp. 141–153. Springer, Heidelberg (2003)
Li, B., Hsiao, M.S., Sheng, S.: A novel sat all-solutions solver for efficient preimage computation. In: DATE 2004 (2004)
Chandrasekar, K., Hsiao, M.S.: State set management for sat-based unbounded model checking. In: ICCD 2005 (2005)
Ganai, M.K., Gupta, A., Ashar, P.: Efficient sat-based unbounded symbolic model checking using circuit cofactoring. In: ICCAD 2004 (2004)
Barrett, C., Donham, J.: Combining SAT methods with non-clausal decision heuristics. In: PDPAR 2004 (2004)
Ganai, M.K., Ashar, P., Gupta, A., Zhang, L., Malik, S.: Combining Strengths of Circuit-Based and CNF-Based Algorithms for a High-Performance SAT Solver. In: DAC 2002 (2002)
Kuehlmann, A., Ganai, M.K., Paruthi, V.: Circuit-based Boolean Reasoning. In: DAC 2001 (2001)
Jin, H., Awedh, M., Somenzi, F.: CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking. In: Alur, R., Peled, D.A. (eds.) CAV 2004. LNCS, vol. 3114, pp. 519–522. Springer, Heidelberg (2004)
Thiffault, C., Bacchus, F., Walsh, T.: Solving non-clausal formulas with dpll search. In: Wallace, M. (ed.) CP 2004. LNCS, vol. 3258, pp. 663–678. Springer, Heidelberg (2004)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2009 Springer-Verlag Berlin Heidelberg
About this chapter
Cite this chapter
Yadgar, A., Grumberg, O., Schuster, A. (2009). Hybrid BDD and All-SAT Method for Model Checking. In: Grumberg, O., Kaminski, M., Katz, S., Wintner, S. (eds) Languages: From Formal to Natural. Lecture Notes in Computer Science, vol 5533. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-01748-3_15
Download citation
DOI: https://doi.org/10.1007/978-3-642-01748-3_15
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-01747-6
Online ISBN: 978-3-642-01748-3
eBook Packages: Computer ScienceComputer Science (R0)