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Combining Model Checking and Testing in a Continuous HW/SW Co-verification Process

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Book cover Tests and Proofs (TAP 2009)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 5668))

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Abstract

SystemC is widely used for modeling and simulation in hardware/software co-design. However, the co-verification techniques used for SystemC designs are mostly ad-hoc and non-systematic. In this paper, we present an approach to overcome this problem by a systematic, formally founded quality assurance process. Based on a combination of model checking and conformance testing, we obtain a HW/SW co-verification flow that supports HW/SW co-development throughout the whole design process. In addition, we present a novel test algorithm that generates conformance tests for SystemC designs offline and that can cope with non-deterministic systems. To this end, we use a timed automata model of the SystemC design to compute expected simulation or test results. We have implemented the model checking and conformance testing framework and give experimental results to show the applicability of our approach.

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Authors and Affiliations

  1. Berlin Institute of Technology, Berlin, Germany

    Paula Herber, Florian Friedemann & Sabine Glesner

Authors
  1. Paula Herber
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  2. Florian Friedemann
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  3. Sabine Glesner
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Editor information

Editors and Affiliations

  1. CÉDRIC-ENSIIE, 1 square de la résistance, 91025, Évry Cedex, France

    Catherine Dubois

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Herber, P., Friedemann, F., Glesner, S. (2009). Combining Model Checking and Testing in a Continuous HW/SW Co-verification Process. In: Dubois, C. (eds) Tests and Proofs. TAP 2009. Lecture Notes in Computer Science, vol 5668. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-02949-3_10

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  • DOI: https://doi.org/10.1007/978-3-642-02949-3_10

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-02948-6

  • Online ISBN: 978-3-642-02949-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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