Abstract
A continuous time neural network of Hopfield type is considered. It is a W(inner) T(akes) A(ll) selector. Its inputs are capacitively coupled to model the parasitics or faults of overcrowded chip layers. A certain parameter setting allows the correct selection of the maximum element from an input list. As processing time is a performance criterion, we infer upper bounds of it, explicitly depending on circuit and list parameters. Our method consists of converting the system of nonlinear differential equations describing the circuit to a system of decoupled linear inequalities. The results are checked by numerical simulation.
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Costea, R.L., Marinov, C.A. (2009). Time Evaluation for WTA Hopfield Type Circuits Affected by Cross-Coupling Capacitances. In: Köppen, M., Kasabov, N., Coghill, G. (eds) Advances in Neuro-Information Processing. ICONIP 2008. Lecture Notes in Computer Science, vol 5507. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03040-6_108
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DOI: https://doi.org/10.1007/978-3-642-03040-6_108
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-03039-0
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