Abstract
To date, various optically reconfigurable gate arrays (ORGAs) have been developed to realize both fast reconfiguration and numerous reconfiguration contexts. Optically differential reconfigurable gate arrays (ODRGAs) present the advantageous capabilities compared with ORGAs: they have increased reconfiguration frequency per unit of laser power and reduced optical power consumption. Dynamic optically reconfigurable gate arrays (DORGA) can realize the highest gate density, but an important disadvantage of DORGAs is that their reconfiguration frequency is lower than that of ODRGAs and their optical power consumption is greater than that of ODRGAs. Therefore, a novel inversion/non-inversion dynamic optically reconfigurable gate array that adopts only the good factors from both architectures has been developed. This paper presents an inversion/non-inversion implementation for a fabricated 11,424 gate-count dynamic optically reconfigurable gate array VLSI. Based on that implementation, three factors are discussed: gate density, reconfiguration frequency per unit of laser power, and optical power consumption.
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References
Altera Corporation, Altera Devices, http://www.altera.com
Xilinx Inc., Xilinx Product Data Sheets, http://www.xilinx.com
Lattice Semiconductor Corporation, LatticeECP and EC Family Data Sheet (2005), http://www.latticesemi.co.jp/products
Nakano, H., Shindo, T., Kazami, T., Motomura, M.: Development of dynamically reconfigurable processor LSI. NEC Tech. J (Japan) 56(4), 99–102 (2003)
Dehon, A.: Dynamically Programmable Gate Arrays: A Step Toward Increased Computational Density. In: Fourth Canadian Workshop on Field Programmable Devices, pp. 47–54 (1996)
Jones, D., Lewis, D.M.: A time–multiplexed FPGA architecture for logic emulation. In: Custom Integrated Circuits Conference, pp. 495–498 (1995)
Mumbru, J., Panotopoulos, G., Psaltis, D., An, X., Mok, F., Ay, S., Barna, S., Fossum, E.: Optically Programmable Gate Array. In: SPIE of Optics in Computing 2000, vol. 4089, pp. 763–771 (2000)
Mumbru, J., Zhou, G., Ay, S., An, X., Panotopoulos, G., Mok, F., Psaltis, D.: Optically Reconfigurable Processors. In: SPIE Critical Review 1999 Euro-American Workshop on Optoelectronic Information Processing, vol. 74, pp. 265–288 (1999)
Miyano, M., Watanabe, M., Kobayashi, F.: Optically Differential Reconfigurable Gate Array. Electronics and Computers in Japan, Part II 90(11), 132–139 (2007)
Watanabe, M., Shiki, T., Kobayashi, F.: Scaling prospect of optically differential reconfigurable gate array VLSIs. Analog Integrated Circuits and Signal Processing (2008)
Seto, D., Watanabe, M.: A dynamic optically reconfigurable gate array - perfect emulation. IEEE Journal of Quantum Electronics 44(5), 493–500 (2008)
Watanabe, M.: A 11,424 gate-count zero-overhead dynamic optically reconfigurable gate array VLSI. In: IEEE International SOC Conference, September 2007, pp. 75–78 (2007)
Watanabe, M., Nakajima, M., Kato, S.: An inversion/non-inversion dynamic optically reconfigurable gate array VLSI. World Scientific and Engineering Academy and Society Transactions on Circuits and Systems 8(1), 11–20 (2009)
Kato, S., Watanabe, M.: Inversion/non-inversion zero-overhead dynamic optically reconfigurable gate array VLSI. In: IEEE International Conference on Field @ Programmable Technology, pp. 377–380 (2008)
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Kato, S., Watanabe, M. (2009). Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI. In: Bertels, K., Dimopoulos, N., Silvano, C., Wong, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2009. Lecture Notes in Computer Science, vol 5657. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03138-0_15
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DOI: https://doi.org/10.1007/978-3-642-03138-0_15
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