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Research on Evaluation of Parallelization on an Embedded Multicore Platform

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Advanced Parallel Processing Technologies (APPT 2009)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5737))

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Abstract

In order to solve the problem of serious performance bottleneck in traditional embedded platform, the parallelization of evaluation algorithms based on an embedded multicore platform is implemented. By analyzing the process of the parallel algorithms on the embedded chip multicore platform, and effectively using the limited memory and cache resource, the evaluation algorithms are implemented in an embedded multicore processor FPGA full function simulation platform. After comparing the parallelization effects of the two multithread models, a conclusion can be made that the shared memory model of parallel multithread fits the embedded multicore platform well. The parallel model generates substantial overall performance increase. An average relative speedup of 3.28 is achieved and meets the low memory resource in embedded architecture. And with the increase in core number the parallelization based on OpenMP model has shown good scalability.

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© 2009 Springer-Verlag Berlin Heidelberg

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Liu, T., Ji, Z., Wang, Q., Xiao, D., Zhang, S. (2009). Research on Evaluation of Parallelization on an Embedded Multicore Platform. In: Dou, Y., Gruber, R., Joller, J.M. (eds) Advanced Parallel Processing Technologies. APPT 2009. Lecture Notes in Computer Science, vol 5737. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03644-6_26

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  • DOI: https://doi.org/10.1007/978-3-642-03644-6_26

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-03643-9

  • Online ISBN: 978-3-642-03644-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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