Abstract
In this work we provide design guidelines for the hardware implementation of Spiking Neural Networks. The proposed methodology is applied to temporal pattern recognition analysis. For this purpose the networks are trained using a simplified Genetic Algorithm. The proposed solution is applied to estimate the processing efficiency of Spiking Neural Networks.
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References
Malaka, R., Buck, S.: Solving nonlinear optimization problems using networks of spiking neurons. In: Int. Joint Conf. on Neural Networks, Como, pp. 486–491 (2000)
Sala, D.M., Cios, K.J.: Solving graph algorithms with networks of spiking neurons. IEEE Trans. on Neural Net. 10, 953–957 (1999)
Gerstner, W., Kistler, W.M.: Spiking neuron models. Cambridge University Press, Cambridge (2002)
Rosselló, J.L., Canals, V., de Paúl, I., Bota, S., Morro, A.: A Simple CMOS Chaotic Integrated Circuit. IEICE Electronics Express 5, 1042–1048 (2008)
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© 2009 Springer-Verlag Berlin Heidelberg
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Rosselló, J.L., de Paúl, I., Canals, V., Morro, A. (2009). Spiking Neural Network Self-configuration for Temporal Pattern Recognition Analysis. In: Alippi, C., Polycarpou, M., Panayiotou, C., Ellinas, G. (eds) Artificial Neural Networks – ICANN 2009. ICANN 2009. Lecture Notes in Computer Science, vol 5768. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-04274-4_44
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DOI: https://doi.org/10.1007/978-3-642-04274-4_44
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-04273-7
Online ISBN: 978-3-642-04274-4
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