Abstract
Few of the benefits of exploiting partially reconfigurable devices are power consumption reduction, cost reduction, and customized performance improvement. To obtain these benefits, one main problem needs to be solved is the task scheduling and placement. Existing algorithms tend to allocate tasks at positions where can block future tasks to be scheduled earlier denoted as ”blocking-effect”. To tackle this effect, a novel 3D total contiguous surface (3DTCS) heuristic is proposed for equipping our scheduling and placement algorithm with blocking-awareness. The proposed algorithm is evaluated with both synthetic and real workloads (e.g. MDTC, matrix multiplication, hamming code, sorting, FIR, ADPCM, etc). The proposed algorithm not only has better scheduling and placement quality but also has shorter algorithm execution time compared to existing algorithms.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Steiger, C., Walder, H., Platzner, M.: Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices. In: Y. K. Cheung, P., Constantinides, G.A. (eds.) FPL 2003. LNCS, vol. 2778, pp. 575–584. Springer, Heidelberg (2003)
Chen, Y., Hsiung, P.: Hardware Task Scheduling and Placement in Operating Systems for Dynamically Reconfigurable SoC. In: EUC, pp. 489–498 (2005)
Marconi, T., Lu, Y., Bertels, K.L.M., Gaydadjiev, G.N.: Online Hardware Task Scheduling and Placement Algorithm on Partially Reconfigurable Devices. In: Woods, R., Compton, K., Bouganis, C., Diniz, P.C. (eds.) ARC 2008. LNCS, vol. 4943, pp. 306–311. Springer, Heidelberg (2008)
Lu, Y., Marconi, T., Bertels, K.L.M., Gaydadjiev, G.N.: Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems. In: ARC, pp. 216–230 (2009)
Zhou, X., Wang, Y., Huang, X., Peng, C.: On-line Scheduling of Real-time Tasks for Reconfigurable Computing System. In: FPT, pp. 57–64 (2006)
Zhou, X., Wang, Y., Huang, X., Peng, C.: Fast On-line Task Placement and Scheduling on Reconfigurable Devices. In: FPL, pp. 132–138 (2007)
Sharma, D.D., Pradhan, D.K.: A Fast and Efficient Strategy for Submesh Allocation in Mesh-Connected Parallel Computers. In: IPDPS, pp. 682–689 (1993)
Xilinx: Virtex-4 FPGA Configuration User Guide. Xilinx user guide UG071 (2008)
Yankova, Y.D., Bertels, K.L.M., Vassiliadis, S., Meeuws, R.J., Virginia, A.: Automated hdl generation: Comparative evaluation. In: ISCAS, pp. 2750–2753 (2007)
Meeuws, R.J., Yankova, Y.D., Bertels, K.L.M., Gaydadjiev, G.N., Vassiliadis, S.: A Quantitative Prediction Model for Hardware/Software Partitioning. In: FPL, pp. 735–739 (2007)
Marconi, T., Lu, Y., Bertels, K.L.M., Gaydadjiev, G.N.: A Novel Fast Online Placement Algorithm on 2D Partially Reconfigurable Devices. In: FPT, pp. 296–299 (2009)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Marconi, T., Lu, Y., Bertels, K., Gaydadjiev, G. (2010). 3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices. In: Sirisuk, P., Morgan, F., El-Ghazawi, T., Amano, H. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2010. Lecture Notes in Computer Science, vol 5992. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12133-3_19
Download citation
DOI: https://doi.org/10.1007/978-3-642-12133-3_19
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-12132-6
Online ISBN: 978-3-642-12133-3
eBook Packages: Computer ScienceComputer Science (R0)