Skip to main content

A Parallel Genetic Algorithm on a Multi-Processor System-on-Chip

  • Conference paper
Trends in Applied Intelligent Systems (IEA/AIE 2010)

Abstract

The aim of the work described in this paper is to investigate migration strategies for the execution of parallel genetic algorithms in a Multi-Processor System-on-Chip (MPSoC). Some multimedia and Internet applications for wireless communications are using genetic algorithms and can benefit of the advantages provided by parallel processing on MPSoCs. In order to run such algorithms, we use a Network-on-Chip platform, which provides the interconnection network required for the communication between processors. Two migration strategies are employed, in order to analyze the speedup and efficiency each one can provide, considering the communication costs they require.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Ivanov, A., De Micheli, G.: The network-on-chip paradigm in practice and research. IEEE Design and Test of Computers 1(1), 399–403 (2005)

    Article  Google Scholar 

  2. Mello, A.M.: Arquitetura multiprocessada em SoCs: estudo de diferentes topologias de conexão (June 2003) [in Portuguese]

    Google Scholar 

  3. Woszezenki, C.: Alocação de tarefas e comunicação entre tarefas em mpsocs. M.Sc., Faculdade de Informática, PUCRS, Porto Alegre, RS, Brazil (June 2007) [in Portuguese]

    Google Scholar 

  4. Moraes, F., Calazans, N., Mello, A., Möller, L., Ost, L.: Hermes: an infrastructure for low area overhead packet-switching networks on chip. Integration, the VLSI Journal 38(1), 69–93 (2004)

    Article  Google Scholar 

  5. Öberg, J., Jantsch, A., Tenhunen, H.: Special issue on networks on chip. Journal of Systems Architecture 1(1), 61–63 (2004)

    Google Scholar 

  6. Benini, L., De Micheli, G.: Networks on chips: a new soc paradigm. IEEE Computer 1(1), 70–78 (2002)

    Article  Google Scholar 

  7. Benini, L., Ye, T.T., De Micheli, G.: Packetized on-chip interconnect communication analysis for MPSoC. In: Proceedings of the Design,Automation and Test in Europe Conference and Exhibition (DATE 2003), pp. 344–349. IEEE Press, Los Alamitos (2003)

    Google Scholar 

  8. Chiwiacowsky, L.D., de Velho, H.F.C., Preto, A.J., Stephany, S.: Identifying initial conduction in heat conduction transfer by a genetic algorithm: a parallel approach 28, 180–195 (April 1980)

    Google Scholar 

  9. Ruiz, P.M., Antonio: Using genetic algorithms to optimize the behavior of adaptive multimedia applications in wireless and mobile scenarios. In: IEEE Wireless Communications and Networking Conference (WCNC 2003), pp. 2064–2068. IEEE Press, Los Alamitos (2003)

    Google Scholar 

  10. Rhoads, S.: Plasma microprocessor (2009), http://www.opencores.org

  11. Hue, X.: Genetic algorithms for optimization – background and applications. Technical report. Edinburgh Parallel Computer Centre, The University of Edinburgh (1997)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2010 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Ferreira, R.E., de Macedo Mourelle, L., Nedjah, N. (2010). A Parallel Genetic Algorithm on a Multi-Processor System-on-Chip. In: García-Pedrajas, N., Herrera, F., Fyfe, C., Benítez, J.M., Ali, M. (eds) Trends in Applied Intelligent Systems. IEA/AIE 2010. Lecture Notes in Computer Science(), vol 6097. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-13025-0_18

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-13025-0_18

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-13024-3

  • Online ISBN: 978-3-642-13025-0

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics