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Employing Test Suites for Verilog Fault Localization

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Current Topics in Artificial Intelligence (CAEPIA 2009)

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 5988))

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Abstract

This article briefly states the idea behind model-based diagnosis and its application to localizing faults in Verilog programs. Specifically this article outlines how to employ a test suite to further reduce the number of fault candidates. For this purpose, we propose the filtering approach and relate it to the concept of Ackermann constraints. Notably, our empirical results demonstrate that our novel technique considerably increases the diagnosis resolution even under presence of only a couple of test cases.

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Peischl, B., Riaz, N., Wotawa, F. (2010). Employing Test Suites for Verilog Fault Localization. In: Meseguer, P., Mandow, L., Gasca, R.M. (eds) Current Topics in Artificial Intelligence. CAEPIA 2009. Lecture Notes in Computer Science(), vol 5988. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-14264-2_1

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  • DOI: https://doi.org/10.1007/978-3-642-14264-2_1

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-14263-5

  • Online ISBN: 978-3-642-14264-2

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