Abstract
The compute core of a FPGA is a complicated programmable logic integrated circuit array which different from the ordinal instruction execution of the traditional computer. It changes the compute pattern of traditional compute and provides a new method to realize the high speed compute. Hardware Implementation is very important when considering computational velocity of neural networks (NNs), especially NNs with learning ability implemented by integrated hardware. Firstly, this paper presents the design of FPGA based coprocessor which is the hardware platform well-suited for the implementation of NNs. Secondly, it expounds hardware implementation of RBF (Radial Basis Function) Neural Network, and analyzes the performance and problem of the system. According the data of experiments, the compute speed of the RBF neural network implemented by hardware that realized by FPGA coprocessor is much higher than the speed of compute run on the PC.
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Yang, Zg., Qian, Jl. (2010). Hardware Implementation of RBF Neural Network on FPGA Coprocessor. In: Zhu, R., Zhang, Y., Liu, B., Liu, C. (eds) Information Computing and Applications. ICICA 2010. Communications in Computer and Information Science, vol 105. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-16336-4_55
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DOI: https://doi.org/10.1007/978-3-642-16336-4_55
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-16335-7
Online ISBN: 978-3-642-16336-4
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