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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 6448))

Abstract

In this paper a low-voltage integrator circuit using MOSFETs in sub-threshold region is presented. This integrator is a Current-mode log-domain circuit. The EKV MOSFET model is used for sub-threshold region simulations. Model parameters of IBM CMOS 130nm technology are used. This integrator works with a 500mv single supply voltage and its input current range is as high as bias current of the input transistor. According to CADENCE simulation results for 1pf integrating capacitor and bias current of 20nA, cutoff frequency is 113.4 KHz and power consumption is 45.44nW. Integrator’s Cutoff frequency is tuned from 1.083 KHz to 1.023MHz using variable integrator capacitor value in the range of 10pf-0.1pf.

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© 2011 Springer-Verlag Berlin Heidelberg

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Ramezani, L. (2011). A Low-Voltage Log-Domain Integrator Using MOSFET in Weak Inversion. In: van Leuken, R., Sicard, G. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation. PATMOS 2010. Lecture Notes in Computer Science, vol 6448. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-17752-1_6

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  • DOI: https://doi.org/10.1007/978-3-642-17752-1_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-17751-4

  • Online ISBN: 978-3-642-17752-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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