Abstract
Verification of security requirements in embedded systems is a crucial task - especially in very dynamic design processes like a hardware/software codesign flow. In such a case the system’s modules and components are continuously modified and refined until all constraints are met and the system design is in a stable state. A transaction level model can be used for such a design space exploration in this phase. It is essential that security requirements are considered from the very first beginning. In this work we demonstrate a novel approach how to use meta-information in transaction level models to verify the consistent application of security requirements in embedded systems.
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Loinig, J., Steger, C., Weiss, R., Haselsteiner, E. (2011). Idea: Simulation Based Security Requirement Verification for Transaction Level Models. In: Erlingsson, Ú., Wieringa, R., Zannone, N. (eds) Engineering Secure Software and Systems. ESSoS 2011. Lecture Notes in Computer Science, vol 6542. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19125-1_21
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DOI: https://doi.org/10.1007/978-3-642-19125-1_21
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-19124-4
Online ISBN: 978-3-642-19125-1
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