Abstract
Designing FPGA-based accelerators is a difficult and time-consuming task which can be softened by the emergence of new generations of High Level Synthesis Tools. This paper describes how the ImpulseC C-to-hardware compiler tool has been used to develop efficient hardware for a known genomic sequence alignment algorithms and reports HLL designs performance outperforming traditional hand written optimized HDL implementations.
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Cornu, A., Derrien, S., Lavenier, D. (2011). HLS Tools for FPGA: Faster Development with Better Performance. In: Koch, A., Krishnamurthy, R., McAllister, J., Woods, R., El-Ghazawi, T. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2011. Lecture Notes in Computer Science, vol 6578. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19475-7_8
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DOI: https://doi.org/10.1007/978-3-642-19475-7_8
Publisher Name: Springer, Berlin, Heidelberg
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