Skip to main content
Springer Nature Link
Log in

A Framework for Specification and Verification of Timeout Models of Real-Time Systems

  • Conference paper
Contemporary Computing (IC3 2011)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 168))

Included in the following conference series:

  • 1184 Accesses

Abstract

Timeout based models are an important class of design models for discrete event modeling and simulation of real-time systems and protocols. In this work, we define a framework to graphically represent timeout based models with synchronous communication. The formalism offers system designers an expressive graphical language with well defined semantics to model their system designs and reason about their behavior. For actual implementation, these models are expressed using GraphML standard with support for embedded ANSI C code. We further devise an automated translation technique (and develop corresponding prototype tool support) to translate the GraphML designs into SAL (Symbolic Analysis Laboratory) model specifications, which in turn, can be formally verified using the SAL verification engine.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. Alur, R., Dill, D.: A Theory of Timed Automata. Theoretical Computer Science 126(2), 183–235 (1994)

    Article  MathSciNet  MATH  Google Scholar 

  2. Baeten, J., Bergstra, J.: Real Time Process Algebra. Formal Aspects of Computing 3(2), 142–188 (1991)

    Article  MathSciNet  MATH  Google Scholar 

  3. Dutertre, B., Sorea, M.: Timed systems in SAL. Technical report, Computer Science Laboratory, SRI International, Menlo Park, CA (2004)

    Google Scholar 

  4. Dutertre, B., Sorea, M.: Modeling and verification of a fault-tolerant real-time startup protocol using calendar automata. In: Lakhnech, Y., Yovine, S. (eds.) FORMATS 2004 and FTRTFT 2004. LNCS, vol. 3253, pp. 199–214. Springer, Heidelberg (2004)

    Chapter  Google Scholar 

  5. Henzinger, T.A., Manna, Z., Pnueli, A.: Timed transition systems. In: Huizing, C., de Bakker, J.W., Rozenberg, G., de Roever, W.-P. (eds.) REX 1991. LNCS, vol. 600, pp. 226–251. Springer, Heidelberg (1992)

    Chapter  Google Scholar 

  6. Knapp, A., Merz, S., Rauh, C.: Model checking - timed UML state machines and collaborations. In: Damm, W., Olderog, E.-R. (eds.) FTRTFT 2002. LNCS, vol. 2469, pp. 395–416. Springer, Heidelberg (2002)

    Chapter  Google Scholar 

  7. Saha, I., Misra, J., Roy, S.: Timeout and calendar based finite state modeling and verification of real-time systems. In: Namjoshi, K.S., Yoneda, T., Higashino, T., Okamura, Y. (eds.) ATVA 2007. LNCS, vol. 4762, pp. 284–299. Springer, Heidelberg (2007)

    Chapter  Google Scholar 

  8. Selic, B.: Using UML for modeling complex real-time systems. In: Müller, F., Bestavros, A. (eds.) LCTES 1998. LNCS, vol. 1474, pp. 250–260. Springer, Heidelberg (1998)

    Chapter  Google Scholar 

  9. Wang, J.: Timed Petri nets: Theory and application. Kluwer Academic Publishers, Dordrecht (1998)

    Book  MATH  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. EMCSS India Private Limited, Bangalore, 560103, India

    Janardan Misra

Authors
  1. Janardan Misra
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Iowa State University and IIT Bombay, India, 329 Durham, Ames, IA 5001, Iowa, USA

    Srinivas Aluru

  2. Indian Statistical Institute, 203 B.T. Road, 700 108, Kolkata, West Bengal, India

    Sanghamitra Bandyopadhyay

  3. The Ohio State University, 3190 Graves Hall, 333 W 10th Ave, 43210, Columbus, OH, USA

    Umit V. Catalyurek

  4. Department of Computing Science, Chalmers University, Rännvagen 6B, 412 96, Göteborg, Sweden

    Devdatt P. Dubhashi

  5. Dept. of Electrical and Computer Engineering, Iowa State University, 329 Durham, IA 50011, Ames, USA

    Phillip H. Jones

  6. TASSL, Dept. of Electrical & Computer Engineering, Rutgers, The State University of New Jersey, Brett Road, NJ 08854-8058, Piscataway, USA

    Manish Parashar

  7. School of Computer Engineering, Nanyang Technological University, N4-02a-32 Nanyang Ave, 639798, Singapore

    Bertil Schmidt

Rights and permissions

Reprints and permissions

Copyright information

© 2011 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Misra, J. (2011). A Framework for Specification and Verification of Timeout Models of Real-Time Systems. In: Aluru, S., et al. Contemporary Computing. IC3 2011. Communications in Computer and Information Science, vol 168. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-22606-9_18

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-22606-9_18

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-22605-2

  • Online ISBN: 978-3-642-22606-9

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics