Abstract
This paper studies the operation of the pass transistor structure taking into account secondary effects which become intense in nanoscale technologies. The different regions of operation are determined and the differential equation which describes the pass transistor operation is solved analytically. Appropriate approximations about the current waveforms are used simplifying the modeling procedure without significant influence on the accuracy. The evaluation of the model was made through comparison with HSpice simulation results and by using three different technologies: CMOS 65 nm, CMOS 32 nm and CMOS 32nm with high-K dielectric.
This work has been supported by FP7, ERA-WIDE JEWEL project 266507, 2010 -2013, funded by European Union.
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© 2011 Springer-Verlag Berlin Heidelberg
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Chaourani, P., Pappas, I., Nikolaidis, S., Rjoub, A. (2011). Pass Transistor Operation Modeling for Nanoscale Technologies. In: Ayala, J.L., GarcÃa-Cámara, B., Prieto, M., Ruggiero, M., Sicard, G. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation. PATMOS 2011. Lecture Notes in Computer Science, vol 6951. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-24154-3_6
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DOI: https://doi.org/10.1007/978-3-642-24154-3_6
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-24153-6
Online ISBN: 978-3-642-24154-3
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