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System Level Performance Analysis for Real-Time Multi-Core and Network Architectures

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Advances in Real-Time Systems

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Abstract

Advances in chip design and communication technology allow the integration of a growing number of functions in distributed embedded systems, ranging from mobile phones through multimedia home platforms to automotive systems. The resulting system complexity makes it a major challenge to build reliable systems, in particular in the context of permanently decreasing time-to-market and production costs. Embedded systems often have to also satisfy real-time requirements, which makes performance verification necessary to exclude critical system failures.

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References

  1. http://www.autosar.org, “Autosar partnership,” Internet.

  2. Tindell K,  Clark J (1994) Holistic schedulability analysis for distributed hard real-time systems, Microproc Microprogram 40(2-3):117–134

    Article  Google Scholar 

  3. Gutiérrez J, García J,  Harbour M (1997) On the schedulability analysis for distributed hard real-time systems. Proceedings of the 9th euromicro workshop on real-time systems, Toledo, Spain, pp 136–143

    Google Scholar 

  4. Chakraborty S, Künzli S, Thiele L (2003) A general framework for analysing system properties in platform-based embedded system designs. Design, Automation and Test in Europe Conference and Exhibition, pp 190–195

    Google Scholar 

  5. Henia R, Hamann A, Jersak M, Racu R, Richter K, Ernst R (2005) System Level Performance Analysis – The SymTA/S Approach. IEE Proc Comput Digital Techniq 152(2):148–166

    Article  Google Scholar 

  6. Gresser K (1993) An event model for deadline verification of hard real-time systems. In: Proceedings of the 5th euromicro workshop on real-time systems, Oulu, Finland, pp 118–123

    Google Scholar 

  7. Bensalem S, Bozga M, Sifakis J, Nguyen T (2008) Compositional verification for component-based systems and application. Automated Technol Verification Anal 5311:64–79

    Article  MATH  Google Scholar 

  8. Puschner P, Schoeberl M (2008) On composable system timing, task timing, and WCET analysis. In: Proceedings of the 8th international workshop on worst-case execution time (WCET) analysis, Prague, Czech Republic

    Google Scholar 

  9. Thiele L, Chakraborty S, Naedele M (2000) Real-time calculus for scheduling hard real-time systems. Circuits and Systems, 2000. Proceedings of the international symposium on ISCAS 2000, Geneva, vol 4, pp 101–104

    Google Scholar 

  10. Le Boudec J, Thiran P (2001) Network calculus: a theory of deterministic queuing systems for the internet Springer-Verlag Berlin, Heidelberg ©2001

    Google Scholar 

  11. Richter K, Racu R, Ernst R (2003) Scheduling analysis integration for heterogeneous multiprocessor SoC. In: Proceedings of the 24th IEEE real-time systems symposium (RTSS), Cancun, Mexico, December 2003

    Google Scholar 

  12. Albers K, Bodmann F, Slomka F (2006) Hierarchical event streams and event dependency graphs: A new computational model for embedded real-time systems. In: Proceedings of the 18th euromicro conference on real-time systems (ECRTS). IEEE Computer Society, Washington, DC, pp 97–106

    Google Scholar 

  13. Albers K, Bodmann F, Slomka F (2008) Advanced hierarchical event-stream model. In: Proceedings of the euromicro conference on real-time systems (ECRTS)

    Google Scholar 

  14. Henia R, Ernst R (2006) Improved offset-analysis using multiple timing-references. In: Proceedings of the conference on design, automation and test in Europe: Proceedings, pp 450–455

    Google Scholar 

  15. Schliecker S, Ivers M, Staschulat J, Ernst R (2006) A framework for the busy time calculation of multiple correlated events. In: Sixth International Worst Case Execution Time Wworkshop

    Google Scholar 

  16. Maxiaguine A, Künzli S, Thiele L (2004) Workload characterization model for tasks with variable execution demand. In: Proceedings of design automation and test in Europe, Paris, France

    Book  Google Scholar 

  17. Wandeler E, Maxiaguine A, Thiele L (2006) Performance analysis of greedy shapers in real-time systems. In: Proceedings of the conference on design, automation and test in Europe: Proceedings, pp 444–449

    Google Scholar 

  18. AUTOSAR (2006) Autosar specification of communication v. 2.0.1, autosar partnership

    Google Scholar 

  19. Richter K (2004) Compositional scheduling analysis using standard event models, Ph.D. dissertation, Technical University of Braunschweig

    Google Scholar 

  20. Wandeler E (2006) Modular performance analysis and interface-based design of embedded systems, Ph.D. dissertation, Swiss Federal Institute of Technology

    MATH  Google Scholar 

  21. Jersak M, Henia R, Ernst R (2004) Context-aware performance analysis for efficient embedded system design. In: Proceeding of design automation and test in Europe

    Book  Google Scholar 

  22. Rox J, Ernst R (2008) Modeling event stream hierarchies with hierarchical event models. In: Proceedings of the design, automation and test in Europe (DATE 2008) Munich, Germany, March 2008

    Google Scholar 

  23. Tindell KW, Burns A, Wellings AJ (1994) An extendible approach for analyzing fixed priority hard real-time tasks, Real-Time Syst 6(2):133–151

    Article  Google Scholar 

  24. Rox J, Ernst R (2008) Construction and deconstruction of hierarchical event streams with multiple hierarchical layers. In: Proceedings of the euromicro conference on real-time systems (ECRTS 2008), Prague, Czech Republic, July 2008

    Google Scholar 

  25. Schliecker S, Negrean M, Ernst R (2009) Response time analysis on multicore ECUs with shared resources, IEEE Trans Industrial Inform 5(4):402–413

    Article  Google Scholar 

  26. Negrean M, Schliecker S, Ernst R (2010) Timing implications of sharing resources in multicore real-time automotive systems. In: SAE world congress. SAE International, Detroit, MI

    Google Scholar 

  27. Carpenter J, Funk S, Holman P, Srinivasan A, Anderson J, Baruah S (2003) A Categorization of Real-time Multiprocessor Scheduling Problems and Algorithms. In Handbook of Scheduling: Algorithms, Models, and Performance Analysis, Joseph Y-T Leung (ed). Chapman Hall/ CRC Press. 2004.

    Google Scholar 

  28. Brandenburg B, John M, Aaron Leontyev H, James H (2008) Real-time synchronization on multiprocessors: To block or not to block, to suspend or spin? Real-Time and Embedded Technology and Applications Symposium, RTAS’08. IEEE, pp 342–353

    Google Scholar 

  29. Andersson B, Jonsson J (2000) Fixed-priority preemptive multiprocessor scheduling: to partition or not to partition. Proceedings of the seventh international conference on real-time systems and applications (RTCSA’00), p. 337

    Google Scholar 

  30. Baker T (2006) A comparison of global and partitioned EDF schedulability tests for multiprocessors. International Conference on Real-Time and Network Systems (RTSN), pp 119–130

    Google Scholar 

  31. AUTOSAR GbR, “AUTOSAR Release v4.0,” http://www.autosar.org/, January 2010

  32. Rosen J, Andrei A, Eles P, Peng Z (2007) Bus access optimization for predictable implementation of real-time applications on multiprocessor systems-on-chip, Real-Time Systems Symposium (RTSS 2007). 28th IEEE International, pp 49–60

    Google Scholar 

  33. Henriksson T, van der Wolf P, Jantsch A, Bruce A (2007) Network calculus applied to verification of memory access performance in SoCs. Workshop on Embedded Systems for Real-Time Multimedia, 2007

    Google Scholar 

  34. Puaut I, Decotigny D (2002) Low-complexity algorithms for static cache locking in multitasking hard real-time systems. In: Proceedings of the 23rd IEEE real-time systems symposium (RTSS). Citeseer, pp 114–123, 2002

    Google Scholar 

  35. Pellizzoni R, Caccamo M (2010) Impact of peripheral-processor interference on WCET analysis of real-time embedded systems, IEEE Trans Comput 59(3):400–415

    Article  MathSciNet  MATH  Google Scholar 

  36. Schliecker S, Negrean M, Ernst R (2010) Bounding the shared resource load for the performance analysis of multiprocessor systems. In: Proceedings of design, automation, and test in Europe (DATE), Dresden, Germany, March 2010

    Google Scholar 

  37. Rajkumar R (1991) Synchronization in real-time systems: A priority inheritance approach. Kluwer, Norwell, MA

    Book  MATH  Google Scholar 

  38. Devi U, Leontyev H, Anderson J (2006) Efficient synchronization under global edf scheduling on multiprocessors. Proceedings of the 18th euromicro conference on real-time systems, pp 75–84, 2006

    Google Scholar 

  39. Schliecker S, Ivers M, Ernst R (2006) Integrated analysis of communicating tasks in MPSoCs. Proceedings of the 4th international conference on hardware/software codesign and system synthesis (Codes-ISSS), pp 288–293, 2006

    Google Scholar 

  40. Schliecker S, Ivers M, Ernst R (2006) Memory access patterns for the analysis of MPSoCs, Circuits and systems, 2006 IEEE North-East Workshop on, pp 249–252

    Google Scholar 

  41. Münnich A, Färber G (2000) Calculating worst-case execution times of transactions in databases for event-driven, hard real-time embedded systems. In: IDEAS, 2000, pp 149–157

    Google Scholar 

  42. Stohr J, von Bulow A, Farber G (2005) Bounding worst-case access times in modern multiprocessor systems, pp 189–198, July 2005

    Google Scholar 

  43. Segars S (1998) The ARM9 family-high performance microprocessors for embeddedapplications. Proceedings of the international conference on computer design: VLSI in computers and processors, ICCD’98, pp 230–235, 1998

    Google Scholar 

  44. Adiletta M, Rosenbluth M, Bernstein D, Wolrich G, Wilkinson H (2002) The next generation of Intel IXP Network Processors. Network Processors 6(3): 6–18

    Google Scholar 

  45. Perathoner S, Wandeler E, Thiele L, Hamann A, Schliecker S, Henia R, Racu R, Ernst R, Harbour MG (2007) Influence of different system abstractions on the performance analysis of distributed real-time systems. In Proceedings of the 7th ACM & IEEE international conference on Embedded software (EMSOFT ’07). ACM, New York, NY, USA, pp. 193–202

    Google Scholar 

  46. Hendriks M, Verhoef M (2006) Timed automata based analysis of embedded system architectures. Workshop on Parallel and Distributed Real-Time Systems, 2006

    Google Scholar 

  47. Racu R, Hamann A, Ernst R, Richter K (2007) Automotive software integration. In: Proceedings of the 44th annual conference on design automation. ACM, New York, pp 545–550

    Google Scholar 

  48. Künzli S, Hamann A, Ernst R, Thiele L (2007) Combined approach to system level performance analysis of embedded systems. Proceedings of the 5th IEEE/ACM international conference on hardware/software codesign and system synthesis, pp 63–68, 2007

    Google Scholar 

  49. Künzli S, Poletti F, Benini L, Thiele L (2006) Combining simulation and formal methods for system-level performance analysis. In: Proceedings of design, automation and test in Europe, 2006

    Google Scholar 

  50. Schliecker S, Negrean M, Nicolescu G, Paulin P, Ernst R (2008) Reliable performance analysis of a multicore multithreaded system-on-chip. Proceedings of the 6th international conference on hardware/software codesign and system synthesis (Codes-ISSS), 2008

    Google Scholar 

  51. Schliecker S, Hamann A, Racu R, Ernst R (2008) Formal methods for system level performance analysis and optimization. In: Proceedings of the design verification conference (DVCON), San Jose, CA

    Google Scholar 

  52. Hamann A, Jersak M, Richter K, Ernst R (2006) A framework for modular analysis and exploration of heterogeneous embedded systems. Real-Time Syst J 33(1-3):101–137

    Article  MATH  Google Scholar 

  53. Hamann A, Racu R, Ernst R (2006) A formal approach to robustness maximization of complex heterogeneous embedded systems. In: Proceedings of the IEEE/ACM international conference on HW/SW codesign and system synthesis (CODES-ISSS), Seoul, South Korea, October 2006

    Google Scholar 

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Author information

Authors and Affiliations

  1. Institute of Computer and Network Engineering, Technische Universität Braunschweig, D-38106, Braunschweig, Germany

    Jonas Rox, Mircea Negrean, Simon Schliecker & Rolf Ernst

Authors
  1. Jonas Rox
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  2. Mircea Negrean
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  3. Simon Schliecker
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  4. Rolf Ernst
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Corresponding author

Correspondence to Jonas Rox .

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Editors and Affiliations

  1. LS für Realzeit-Computersysteme, TU München, Arcisstraße 21, München, 80290, Germany

    Samarjit Chakraborty

  2. LS Kommunikationsnetze, TU München, Arcisstr. 21, München, 80290, Germany

    Jörg Eberspächer

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Rox, J., Negrean, M., Schliecker, S., Ernst, R. (2012). System Level Performance Analysis for Real-Time Multi-Core and Network Architectures. In: Chakraborty, S., Eberspächer, J. (eds) Advances in Real-Time Systems. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-24349-3_8

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  • DOI: https://doi.org/10.1007/978-3-642-24349-3_8

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  • Online ISBN: 978-3-642-24349-3

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