Abstract
The Single-chip Cloud Computer (SCC) from Intel Labs is an experimental CPU that integrates 48 cores. As its name suggests, it is a distributed memory system on a chip. In typical configurations, the available memory is divided equally across the cores. Message passing is supported by means of an on-die Message Passing Buffer (MPB). The memory organization and hardware features of the SCC make it an interesting platform for evaluating parallel programming models. In this work, an MPI implementation is optimized and extended to support the invasive programming model; the invasive model’s main idea is to allow for resource aware programming. The result is a library that provides resource awareness through extensions to MPI, while keeping its features and compatibility.
Support for this work was provided by the Transregional Collaborative Research Centre 89: Invasive Computing (InvasIC)[12].
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References
Held, J.: “Single-Chip Cloud Computer”, an IA Tera-Scale Research Processor. In: Guarracino, M.R., Vivien, F., Träff, J.L., Cannatoro, M., Danelutto, M., Hast, A., Perla, F., Knüpfer, A., Di Martino, B., Alexander, M. (eds.) Euro-Par-Workshop 2010. LNCS, vol. 6586, p. 85. Springer, Heidelberg (2011)
Mattson, T.G., Van der Wijngaart, R.F., Riepen, M., et al.: The 48-core SCC processor: The programmer’s view. In: Supercomputing Conference, ACM/IEEE, New Orleans, LA (2010)
Clauss, C., Lankes, S., Galowicz, J., Bemmerl, T.: iRCCE: A Non-blocking Communication Extension to the RCCE Communication Library for the Intel Single-Chip Cloud Computer, Chair for Operating Systems, RWTH Aachen University (December 17, 2010)
Comprés Ureña, I.A., Riepen, M., Konow, M.: RCKMPI – Lightweight MPI Implementation for Intel’s Single-Chip Cloud Computer (SCC). In: Cotronis, Y., Danalis, A., Nikolopoulos, D.S., Dongarra, J. (eds.) EuroMPI 2011. LNCS, vol. 6960, pp. 208–217. Springer, Heidelberg (2011)
van der Wijngaart, R.F., Mattson, T.G., Haas, W.: Light-weight communications on intel’s single-chip cloud computer processor. SIGOPS Oper. Syst. Rev. 45, 73–83 (2011)
Verstraaten, M., Grelck, C., van Tol, M.W., Bakker, R., Jesshope, C.R.: On mapping distributed s-net to the 48-core intel SCC processor. In: Third MARC Symposium, Ettlingen, Germany (July 2011)
Teich, J., Henkel, J., Herkersdorf, A., Schmitt-Landsiedel, D., Schröder-Preikschat, W., Snelting, G.: Invasive Computing: An Overview. In: Multiprocessor System-on-Chip – Hardware Design and Tool Integration, pp. 241–268. Springer, Heidelberg (2011)
Clauss, C., Lankes, S., Bemmerl, T.: Performance Tuning of SCC-MPICH by Means of the Proposed MPI-3.0 Tool Interface. In: Cotronis, Y., Danalis, A., Nikolopoulos, D.S., Dongarra, J. (eds.) EuroMPI 2011. LNCS, vol. 6960, pp. 318–320. Springer, Heidelberg (2011)
McKeeman, W.M.: Algorithm 145: Adaptive numerical integration by simpson’s rule. Commun. ACM 5, 603–604 (1962)
Khan, R.: SCC Baremetal Framework Bandwidth and Power Findings. In: 2nd Many-core Architecture Research Community (MARC) Symposium, Santa Clara (March 30, 2011), (presentation) http://communities.intel.com/docs/DOC-6258
MPICH2: High-performance and Widely Portable MPI, http://www.mcs.anl.gov/research/projects/mpich2/
Transregional Research Center InvasIC, http://www.invasic.de
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Ureña, I.A.C., Riepen, M., Konow, M., Gerndt, M. (2012). Invasive MPI on Intel’s Single-Chip Cloud Computer. In: Herkersdorf, A., Römer, K., Brinkschulte, U. (eds) Architecture of Computing Systems – ARCS 2012. ARCS 2012. Lecture Notes in Computer Science, vol 7179. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-28293-5_7
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DOI: https://doi.org/10.1007/978-3-642-28293-5_7
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