Abstract
Physically Unclonable Functions (PUFs) exploit the physical characteristics of silicon and provide an alternative to storing digital encryption keys in non-volatile memory. A PUF maps a unique set of digital inputs to a corresponding set of digital outputs. In this paper, the use of asynchronous logic and design techniques to implement PUFs is advocated for Asynchronous Physically Unclonable Functions (APUFs). A new method of using asynchronous rings to implement PUFs is described called AsyncPUF which features inherent field programmability. It is both a novel and holistic PUF design compared to the existing state-of-the-art as it naturally addresses the two challenges facing PUFs to-date that prevent wide-spread adoption: robustness and entropy. Results of electrical simulation in a 90 nano-metre lithography process are presented and discussed.
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References
Ührmair, U.R., Sehnke, F., Ölter, J.S., Dror, G.: Modeling attacks on physical unclonable functions. In: Proceedings of 17th ACM Conference on Computer and Communications Security, pp. 237–249 (2010)
Suh, G.E., Devadas, S.: Physical unclonable functions for device authentication and secret key generation. In: Proceedings of the 44th Annual Design Automation Conference, DAC 2007, New York, USA, pp. 9–14 (2007)
Sutherland, I., Fairbanks, S.: GasP: a minimal FIFO control. In: Seventh International Symposium on Asynchronous Circuits and Systems, pp. 46–53 (2001)
Murphy, J., Yakovlev, A.: An Alternating Spacer AES Crypto-processor. In: Proceedings of the 32nd European Solid-State Circuits Conference, pp. 126–129 (September 2006)
Muller, D.E., Bartky, W.S.: A Theory of Asynchronous Circuits. In: Proc. Int’l Symp. Theory of Switching, Part 1, pp. 204–243. Harvard Univ. Press (1959)
Williams, T.E., Horowitz, M.A.: A Zero-Overhead Self-Timed 160-ns 54-b CMOS Divider. IEEE Journal of Solid-State Circuits 26(11), 1651–1661 (1991)
Sutherland, I.E.: Micropipelines. Communications of ACM 32(6), 720–738 (1998)
Ebergen, J.C., Fairbanks, S., Sutherland, I.E.: Predicting performance of micropipelines using charlie diagrams. In: Proceedings of Fourth International Conference on Asynchronous Circuits and Systems, pp. 238–246 (1998)
Lofstrom, K., Daasch, W., Taylor, D.: Ic identication circuit using device mismatch. Digest of Technical Papers, IEEE International Conference in Solid-State Circuits (ISSCC), pp. 372–373 (2000)
Pappu, R.S., Recht, B., Taylor, J., Gershenfeld, N.: Physical one-way functions. Science 297, 2026–2030 (2002)
Gassend, B., Clarke, D., van Dijk, M., Devadas, S.: Silicon physical random functions. In: Proceedings of the 9th ACM Conference on Computer and Communications Security (CCS), New York, USA, pp. 148–160 (2002)
Lim, D., Lee, J., Gassend, B., Suh, G., van Dijk, M., Devadas, S.: Extracting secret keys from integrated circuits. IEEE Transactions on Very Large Scale Integration Systems 13(10), 1200–1205 (2005)
Tuyls, P., Schrijen, G.-J., Škorić, B., van Geloven, J., Verhaegh, N., Wolters, R.: Read-Proof Hardware from Protective Coatings. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, vol. 4249, pp. 369–383. Springer, Heidelberg (2006)
Guajardo, J., Kumar, S.S., Schrijen, G.-J., Tuyls, P.: FPGA Intrinsic PUFs and Their Use for IP Protection. In: Paillier, P., Verbauwhede, I. (eds.) CHES 2007. LNCS, vol. 4727, pp. 63–80. Springer, Heidelberg (2007)
Kumar, S., Guajardo, J., Maes, R., Schrijen, G.-J., Tuyls, P.: Extended abstract: The butterfly puf protecting ip on every fpga. In: IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), pp. 67–70 (2008)
Helinski, R., Acharyya, D., Plusquellic, J.: A physical unclonable function defined using power distribution system equivalent resistance variations. In: Proceedings of the 46th Annual Design Automation Conference (DAC), New York, USA, pp. 676–681 (2009)
Suzuki, D., Shimizu, K.: The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes. In: Mangard, S., Standaert, F.-X. (eds.) CHES 2010. LNCS, vol. 6225, pp. 366–382. Springer, Heidelberg (2010)
Krishna, A.R., Narasimhan, S., Wang, X., Bhunia, S.: MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array. In: Preneel, B., Takagi, T. (eds.) CHES 2011. LNCS, vol. 6917, pp. 407–420. Springer, Heidelberg (2011)
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Murphy, J. (2012). Asynchronous Physical Unclonable Functions – AsyncPUF. In: Dziech, A., Czyżewski, A. (eds) Multimedia Communications, Services and Security. MCSS 2012. Communications in Computer and Information Science, vol 287. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-30721-8_23
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DOI: https://doi.org/10.1007/978-3-642-30721-8_23
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