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Temporal Logic Model Checking in Alloy

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Abstract State Machines, Alloy, B, VDM, and Z (ABZ 2012)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7316))

Abstract

The declarative and relational aspects of Alloy make it a desirable language to use for high-level modeling of transition systems. However, currently, these models must be translated to another tool to carry out full temporal logic model checking. In this article, we show how a symbolic representation of the semantics of computational tree logic with fairness constraints (CTLFC) can be written in first-order logic with the transitive closure operator, and therefore described in Alloy. Using this encoding, the question of whether a declarative model of a transition system satisfies a temporal logic formula can be solved using the Alloy Analyzer directly. Also, since a declarative description of a model may actually represent a family of transition systems, we define two distinct model checking questions on this family (existential and universal model checking) and show how these properties can be evaluated in the Alloy Analyzer.

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Vakili, A., Day, N.A. (2012). Temporal Logic Model Checking in Alloy. In: Derrick, J., et al. Abstract State Machines, Alloy, B, VDM, and Z. ABZ 2012. Lecture Notes in Computer Science, vol 7316. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-30885-7_11

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  • DOI: https://doi.org/10.1007/978-3-642-30885-7_11

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-30884-0

  • Online ISBN: 978-3-642-30885-7

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